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16 Threads found on Ncverilog Dump
Hi, I'm running a mixed mode design that is using verilog for digital and spice netlist for analog. The tool is using ncverilog. I'm wondering that I can't see any response from the analog design on the waveform that is in a fsdb file. Is is a problem on fsdb dump? Suppose, the dump systemtask $fsdbdump is the same (...)
hi, I'm working with Novas and ncverilog together to dump waveforms. It is strange that the log always shows this message: *** Registering Novas Verilog system tasks... ERROR: TF TFTHRE The user defined task or function $fsdbdumpfile has already been registered. ERROR: TF TFTHRE The use
Sir, could you tell me how to install ncverilog5.4 in WIN7? I can not complete installing. When I click setup.exe, then it does not work.
Hi, You didn't link PLI properly ... try -loadpli setenv LD_LIBRARY_PATH $Novas_HOME/share/PLI/ius8.2_vhpi/Linux/boot Ex:- ncverilog -loadpli1 debpli:novas_pli_boot +access+rw -f run.f Jony
Hi All, Can you please tell me how it is possible to obtain the power consumption of a digital circuit from digital gate-level simulation using ncverilog ?
Hi all, I use ncverilog to simulate & usually debug from ncsim cmdline. Its obvious that the tool can check all the object path names (for example when we dump wave it can check path name validity) but I cant find any tcl command that help me list all instance path names (a kind of object right) in the design, which is always my need. Any one
I was trying to dump fsdb in ncsim by using the cmd "ncverilog +loadpli1=${DEB_PLI_FILE}:debpli_boot xxx" But I got this error: ERROR: ACC PLISVG The routine acc_object_of_type() cannot be applied to an object of type . Use the SystemVerilog VPI instead (Clause 27, IEEE Std 1800-2005). Anyone has seen th
I know it's pretty easy in other simulators like ncverilog, vcs. But Quartus simply ignores a lot of system tasks like "$fdisplay". If I need to dump an output from simulation into a data file instead of show it in the waveform, what can I do? Thanks a lot~
hi quan228228, I faced the same problem before with ncverilog. Please try the command below: ncverilog test.v test1.v +ncelabargs+"-access +r" |run.log Hope it helps, -no_mad
Hi pavanP, When you wanna dump the waveform to a file, you need use access+rw, i.e. ncverilog +access+rw
I want to run simulation with NC_verilog. during sim i want to dump fsdb file and call some MyPLI function and task. My problem is : >>ncverilog -f run.f after type the above command, the nc will load the default pli&vpi lib, which is libvpi.dll and libpli.dll. Now i have two pli.dll one is for debussy to dump fsdb file and the (...)
write the location of all the source files in a file. and then type ncverilog -f "filelist" in unix prompt
You'd better read ncverilog tutorial first.
Now ncverilog version 5.1 support 64bit mode. However, Nova pli seems does not support 64bit mode, which leads to that I can not use $fsdbdump to dump signals in 64bit mode. Of course, I can use vcd dump method. As you know, the vcd file dumpped is too large. Is there any other way to solve the problem?
I encounter a serious problem that when i run ncverilog with my code at normal(nondebug) mode everything is ok, but when i use linedebug mode(want to dump some wave), my code just fails. How it can be?? is it cadence bug? and my code works well when using Modelsim5.7 My college also counter such problem, his code runs well in modelsim (hav
Hi guys, When I run the gate level simulation, ncverilog cannont dump out waveform. It shows "ERROR: ACC VISNOC Attempting to place a value change callback on top.HCLK which does not have read access. .\easy_bfm.v, 65: $fsdbdumpvars." I used $dumpvars to dump (...)