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## Questions about 2nd Order Sigma Delta Modulator

Hi guys: I am designing a 2nd order sigma delta modulator in cadence. The problem is that I found the low frequency noise components within signal bandwidth are much higher than they should be according to the noise shaping function as shown the figure below. My input bandwidth is 24KHz, and input signal is 24KHz, sampling rate is (...)

## Cadence pss+pnoise: output Noise result problem

Dear all, I am using C@dence to simulate my upmixer circuit and want to get Output noise value. I am using pss+pnoise to simulate it. In the "Direct Plot Form", it could allow me to select "Output noise". However, I found the result is different using this equation " Ouput noise = -174dBm/Hz + Gain + NF " The (...)

## PSS + PNOISE and Transient Noise

Hi all, I have several questions which i will describe by topics. All the circuit design is made in Candence using Spectre. 1 - As transient noise introduces noise in the transient simulation, I export the data to Matlab to perform the Jitter (RMS and Peak-to-Peak) calculations. How can I do this in cadence ? 2 - How can be compared (...)

## IIP3 and NF measurements in cadence spectre

Hello all, I want to measure IIP3 and noise Figure with cadence application is a fully differential Low-Pass filter.Could somebody guide me with details how to setup the simulations?If possible i would appreciate a screenshot of a similar testbench for filter application. At the input of my testbench i use a port (port component fr

## S-domain and Z-domain ( SDADC ) !!!

hi all, - I'm still working on my Sigma Delta ADC modelling but i still can't model even the 1st order using cadence i want to see the noise shaping through ( NTF ) and signal shaping through (STF ) in cadence but how to model the SDADC for example H(z)= (1/z-1) which block should i use for it ? and the quantizer should i just add (...)

## Opamp for Sigma Delta ADC in 90nm...

I have to design two opamp's in cadence that i will be using in my masters project(16 bit Delta sigma ADC) in 90nm\displaystyle far as i know till now, opamp's used in converters should be Low i/p noise, faster settling and High GainBandwidth product, Low offset voltage....are there any more considerations to be considered while designing op

## problems in LC vco design using cadence tool

Hi all Does an LC VCO schematic contain a pulse generator with a very large period (can be placed in series with one of the capacitors) just as a source for noise to help start oscillation?? My LC VCO only works in this case but it doesn't work on removing the pulse generator, is this correct?? Also, there is something I can't understand, I des

## how to get flicker noise for NMOS and PMOS?

Hi Guys How to get the flicker noise of NMOS and PMOS devices from simulation? What kind of simulation should be ran to get it? Thanks

## Question about pnoise of Charge-pump

I have designd a charge pump of PLL. And I simulated pnoise of Spectre of cadence. The result of charge pump output noise is larger than 100pA at 1KHz. I don't know what is reason about this? Below is my cirucit and simulation result. :cry: Can anyone help me ?Thank you very much

## what is the difference between input noise and equvalient noise in cadence

... input noise and equvalient input noise,,output noise and equvalient output noise,who can tell the difference between them? ... Equivalent noise simply represents a noise source (current, voltage, or resistor) at the input, output, or any other terminal of a noiseless (...)

## PSS (periodic steady state) and Phase Noise analysis in Multisim

Hi. Y'all The attached file is one of relaxation oscillators I am using. This circuit specifically uses a TI?s TLC3702 comparator to generate a square wave output. Can you perform a pss (periodic steady state) and phase noise analysis for this relaxation oscillator in Multisim? My first software, cadence, has both simulations. However, I can?

## PLL design flow examples?

Hello all, I know this is a repeated question without a definite answer, but I have to ask this again. Have you ever seen a example of PLL design flow with cadence or other cad tools? It does not matter whether it's based on cadence SpectreRF or Synopsys HspiceRF. I know cadence has "noise Aware PLL Design Flow", (...)

Hi guys, in cadence, i can plot the noise power spectrum with noise analysis. but how can i get the integrated noise information?

I have a current source which charges a capacitor to generate a slop voltage. I want to find out the noise at the capacitor output. Since the capacitor voltage keep rising, there is no steady state. How can i perform the noise analysis?

## tran noise sim in cadence of 2-1 sigma-delta modulator with different sampling cap

I designed a 2-1 sigma-delta modulator and found fft issue I don't understand. My sim has 2 steps: 1) run "tran" analysis in spectre (select "Transient noise" option) 2) read data from modulator output to matlab and do fft in matlab I used 2 different sampling capacitors (1pF, 4pF) for the first integrator and other parameter (fclk, fsample, N

## Transient noise in OCEAN

There is a tnoise checkbox in the more recent versions of the PDK/cadence combo I use. I think that setting may not be in the Ocean script (no Ocean expert here). Might want to set up a dummy AE window run where you know tnoise works by the outcome, and Save Ocean Script that you can sift for any missing switches. Also find that (...)

## Noise calculation: uV^2 /Hz to dB

hi~ rismriti. i think you want to calculate noise figure by using input referred noise voltage. noise figure(NF) is calculated this equation. NF=10log(1+(V^2/kTR)) (V=input referred noise voltage, k=boltzmann's constant, T=temperature in Kavin, R=50Ω)

## pll phase noise and jitter calculation

i think for jitter, you have to measure the eyediagram of the signal. for phase noise of a pll in cadence spectre, just do pss and pnoise analysis. actually you can get the help from CDSDOC file.

## phase noise calculation using cadence spectre

can anybody pls tell me how to find out the phase noise plot of pll in spectre....