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1000 Threads found on edaboard.com: Noise Canceling
Anything goes. Problems you need to be aware of are safe isolation of interlock wiring to power circuits, required noise immunity, possible safety related control requirements. Most interlock circuits are using normal closed rather than normally open contacts. They are connected in a loop so that any contact opening stops the machine.
if a mosfet drain is switching 200hz-800khz at 400v 8-9 amps pulsed (1.5amps average) and is soldered right onto a large drain copper pour >20mm^2 will it emanate a lot of emi and even damage onboard components?
I am trying to run a HSPICE simulation which involves testing for process variation and effect of noise on the circuit. The HSPICE models that model the process variation require me to run a Monte Carlo simulation. Moreover, the models are encrypted so I cannot modify the parameters or even know what is being modified. I have to use a transient
Image sensor needs to be monochrome, with sufficient resolution, high dynamic range. I also need to specify image sensor calibration but what is the need to calibrate image sensor? How calibration works in a typical image sensor from BAE Systems? It involves taking dark frames for dark frame subtraction to remove st
hi i use lm35 temperature sensor and stm32 f030k6 for reading sensor output when i call sim800 , lm35 output is noisy and incorrect value and When I open the antenna, the noise disappears. How can I remove this noise? thanks
Similar discussion, slewing vs noise performance is the point.
Hi, "Different" Please be more specific. Maybe it's just different "color"... But it could also be different * timing * amplitude * noise * phase * and a lot else... As so often: pictures say more than a lot of words Klaus
Apart from slewing it also affects noise performance. The PMOS current sources at the output will generate more output noise for higher currents.
Hi, Interested in frequency. Yes, I need a high low output. I want to keep the enable pin away from voltage noises. Any noise at square wave net must not effect the enable pin of lt4356 pin.
between an 8 bit up counter and a down counter, which synthesizes into smaller hardware? So similar that the difference is within the noise range of a synthesis tool.
Dear colleagues, Can anyone explain how this calculation is made? This is an example of integrating phase noise to get rms jitter. I calculated the rectangular area (0.063p) but I have a problem with calculating the other trapezoid sections. I divided each of them to a rectangle and a triangle but my results are different from what's written.
Dear colleagues, Your support is kindly needed as I have designed an Injection-locked ring oscillator and I needed to measure the jitter value. I made pnoise simulation and got the phase noise value before and after injection from the output graphs. However, jitter simulation seems a bit tricky to me. According to phase noise/jitter (...)
You haven't said anything about the application because similar has been done before with Logic in many different ways. ECL,PECL, CML,SAS,SATA,LVDS etc . Do you care about jitter, equalization for losses on FR4, EMI, differential 50 Ohms? Impedance tolerance? Prop Delay? Return Loss? 25mV De-noise hysteresis? DC bias, ESD protection? Make,? buy? 1
Hello, I have a uni polar balanced/differential output transducer where wiring can be seen at page 41 of this manual. The transducer outputs around +/-200mV and I want to amplify this with a gain of at least 10. The data acquisition board is also differential inputs. A
Ring oscillators are not really resonant, I wonder whether you are just setting yourself a task with no useful result. They certainly are not small-signal resonant once you get to a significant number of stages - at some point the signals become bang-bang, square, and there is nothing linear going on except momentarily as stages cross the inverter
I cannot explain and find out the reason that cause the noise floor getting high and even becoming flat or some strange ringing. 1 input which is bin=79 has the same result for both condition.Loop is unstable except for bin=79 when you use transistor level feedback DAC. Do you compensate excessive delay ? T
transformer start to produce a noisy sound like"tik-tik-tik" and voltage change beetwen 40-45 The irregular operation could be unwanted 'hiccup' mode, or maybe a case of squegging. It works okay for a few cycles, then a momentary lockup. As this repeats back-and-forth, the transformer can make audible noises.
Hi. I currently doing project on extension of op amp bandwidth using active inductor. Is it possible to get higher bandwith until terahertz as it will cut off the frequency isn't it? And what is the difference of low noise amplifier with opamp?
Hi, I'm currently evaluating my measurement hardware by means of its SNR behaviour. The circuit is designed to digitize a DC voltage. For test proposes I'm using a constant DC voltage. To increase the SNR for low analoge signal levels, I'm performing an averaging. This works as expected for low input signal amplitudes (low SNR) e.g. 100 sampl
Hi, I am trying to figure out if a micro-tel 1200 wide range receiver needs service or not receiver seems to work ok but: If I connect a ham radio receiver at it's 30MHz IF output, I can notice the demodulated AM signals but there is lots of hum also there, so