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Hi, we can neither check your hardware nor check your code, as long as you donīt post it. So Iīve googled and found a lot of "how to use GY80" guidelines. Did you read them? Please provide more information. Klaus
you do not tell us how long the interconnecting transmission line is, nor how much amplitude ripple you can live with over a bandwidth. If they are really close, just hook one to the other. If they are far apart, you could add a series resistor at the mixer, and run 75 ohm line. if it is narrowband, you could just run 50 ohm line from the
not knowing your technology nor your DRC rules, I 'd assume: You have N_WELLs WITH DIFFERENT POTENTIAL in your layout. Seems - in your technology - that N-Wells have to be marked (e.g.) by a DNW_LV_MARK marking layer. But there must be different DNW_LV_MARK marking layer polygons for N_WELLs WITH DIFFERENT POTENTIAL. And these have
you don't say it is video or stills nor if it color or B/W nor resolution BUT if you need to do 1) and especially 3) as well you definitely can not use a wee micro-controller, you need a full-blown PC.
Hi guys, 1. I'm simulating 8 bit mips processor from CMOS VLSI DESIGN: 4th Edition. This is results that I obtained for Astro and VCS using Synopsys. I've no problem with Astro but for VCS simulation, at the first instruction, the result is ok but when it proceeds to second instruction, there is something which I not quite understand. Why the me
I do not hold solder in my teeth nor with my toes. instead I fasten down the item I am soldering and hold the solder in one hand and the soldering iron in the other hand, or I fasten down the solder and hold the item to be soldered in one hand and the soldering iron in the other hand. Some handicapped people have only one hand and they have no prob
Your photo-diode is not a current nor a voltage source because it is reverse biased. Then light on it causes it to leak and become a resistance. Then it conducts some of its bias to the opamp input. A photo diode without bias is a tiny solar cell that does generate a voltage and a current.
You're right: this cascode circuit is not very temperature (nor supply voltage) stable. But at least Q1's Vc will stay 1*Vbe below Q2's Vb. The Figure 2.24 text just says the current stability referred to load changes is improved (compared to a simple constant current source). This is true, because the cascode transistor Q2 (in base mod
Standard core voltage for a 180nm process is 1.8V. Usable voltage may range from 0.9 to 2.5V, depending on the foundry's specification. It does not depend on any model type nor EDA tool label.
I'm trying to do this in schematic, may be this is not possible in the schematic? Right. In schematics no vias (nor layers) are used. Just wires to connect schematic symbols.
Lets put it this way: Xilinx does not provide tools that can convert a .bit file back to a netlist, nor does any other vendor.
The everyday way to measure power is to connect various resistance loads. Measure the volts and amps delivered. notice that maximum power is not always achieved at maximum volts, nor is maximum power always achieved at maximum amperes. Since you have two fixed voltages, you should test the total power when (a) both are powering loads, and (...)
Hello I am developing a system that needs to work with nor FLASH PC28F128P33T85 Numonyx . My codes are in assembly and following is some sample of the codes. When i write and then read , it has not been written to the location. Anybody can help me? any experiences is need on 28F128 Series nor Flashes. Datasheet is the way i have a
If both inputs of a 2-inputs NAND gate are high then its output is low. If both inputs of a 2-inputs nor gate are low then its output is high. The "N" means it inverts. They are logic gates so they do not default to anything. If a logic gate is TTL then it draws a high power supply current all the time and its inputs float to a logic high if they
No, you are not correct. All that bit of code says is that "if a is greater than or equal to b, assign a to d." The value of b is not changed by the comparison, and nor would it be in the microcontroller world. There is also nothing in that code to indicate that a<=b would always evaluate to TRUE. You have given no (...)
The difference between both calculations (11 versus 53 primary turns) comes from different designed Bmax values. Unfortunately neither the 450 mT nor the 100 mT number have been substantiated. A core loss and transformer temperature rise calculation should be performed. If you do it, you'll see that 100 mT ("1000 G") is not effectively utilizing th
zeners are not efficient nor stable compared to bandgap reference diodes used in all LDO's (LM317 type and many others) Zeners must draw more than the worst case load to ensure when loaded there is still enough current to get past the knee in the zener. Then when no load, that current * voltage can lead to thermal problems for high power. So
The tiny speaker produces no bass sounds below 150Hz. I could not find a manufacturer's name nor datasheet for the little stereo amplifier IC. The two channels of the amplifier are already bridged so their outputs cannot be combined for higher output power in mono. With a 5.5V supply, it produces 1.5W into 4 ohms per channel with low (...)
You need to know the actual LDR resistance with the room light, not with sunlight nor moonlight. When the room is not lighted then is there any other light that would reduce the resistance of the LDR? Measure the LDR. Then you will be able to design a simple circuit.
i implemented vhdl program for one of the digital design, here latch (using nor gates) is one of the components, while i simulate the output of latch is undefined--u--, if i plase some delay(after x ns) in inputs of latch the out put is came, but the hardware didn't consider this type(after x ns) of commands. if i check that latch component