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16 Threads found on Phutane
manfacuturing grid is like we will be having grid in the tool . we have a start with a paritcular gird and to proceed our design flow, so that the compnent or cell which we are to place or assemble will be alingned in a proper way so that during manfacture it will be quite easier to fab. hope u got phutane
Dear dude, performance wise n-well is better, problem in dual well is latch up formation and issues like preventing in occurance of them. normally dual well is used in all designs. phutane
Dudes, SI issues are mainly Cross talk, IR drop, Electomigration, ,manfacturing related issues Is there anything apart this phutane
Dear dude, as we go on doing parallel connection means we are going on increasing the width whereas if we go increase serially the length increases. as per CMOS design we can go on increase width but not length So we prefer parallel connections phutane
Hai everyone, I SRAM design we say as - to read i takes 1.2ns to write it takes .8ns (.8ns & 1.2ns) are just examples so how do we calculate and come to a confirmation that this is best which cannot go below or cant go above. phutane
Dear Dude, The nonrecurring-engineering ( NRE ) charge includes the 1) cost of work done by the ASIC vendor and 2) the cost of the masks. phutane
Dear dude, Find the attatcment for the thing u asked phutane
Dear dudes, Can anybody give valid information about, floorplan, routing, placement information With thanks phutane
Dear dudes What is meabt by seeding? phutane
Dear dudes, Resistance increses from (suppose there are four layers in design) Metal 4,metal3, matal2,metal1 We also know that power stripes or rings should be nearer to core means metal1 is nearer, which is higher resistance. My doubt is do power stripes must be of higher resistant? phutane Generall
phutane, Metals used for Power stripe should have low resistant for the purpose IR drop. Higher metals like M4 & M3 have low resistant compared to lower Metals M1 & M2. so M4 & M3 are preferred for power stripes.
Dear Dude, No way we can implement MUX using XOR. If implementation is possible pls do let me to know phutane
dude, Fault coverage is higher since, by this we can cover or obesevre all the test points and also we can control the test point coverage so that fault causes can be easily identified hope i have answered, also dudues Corect me if i am wrong phutane
dear dude, Add buffers , adjust the size of buffers so that slew can be adjusted. phutane
Dear Dude, Normally power analaysis will be done for power. actually what is ur question in could not get properly. r u saying about dynamic power or vdd or vss. which power r u taking about. phutane
hai dude, What u want to do with DC motor, Do u want to change the direction(polarity), else u want to control the speed, or what like to display . give info so that i can help phutane