1000 Threads found on edaboard.com: Reduce
I'm going to implement the project. I'm using syn0psys. I have some questions.
1. What order of DFT and BSD insertion is correct?
- DFT ==> BSD, then the generated BSD logic will be unscannable, which will inevitably reduce the test coverage;
- BSD ==> DFT, then the scan chains will cover all the logic, including BSR + TAP, howeve
ASIC Design Methodologies and Tools (Digital) :: 03-31-2017 15:26 :: scorp_nn :: Replies: 0 :: Views: 341
If I switch out an M1 layer with M10 this will reduce the delay since R is less for higher M. But how does this affect power consumption provided there are no adjacent interconnects (No interwire capacitance). The self capacitance is higher , so does that mean M10 consumes more power than M1?
ASIC Design Methodologies and Tools (Digital) :: 03-30-2017 17:01 :: identical :: Replies: 1 :: Views: 542
You are perhaps with a high RC time constant at the Reset pin.
Try to reduce it to the minimal possible, OR
As you said, invert the logic that control this pin ( keep in mind that in the 51 architecture most I/Os has built-in pullup resistors)
Microcontrollers :: 03-28-2017 14:57 :: andre_teprom :: Replies: 3 :: Views: 493
Generally we go for matching to reduce the effects like stress and thermal gradient but how can i decide that which matching is best and how the layout effects are cancel each other ?
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 03-24-2017 06:46 :: Esakki raja :: Replies: 1 :: Views: 927
I want to count down from 7FF (Hex) to 000. I wonder if I have to type every single number or there is a simple way!
I think you could use the PULSE function. Here's an example for 12 bit. For counting down from 0x7FF to 000 you'd have to reduce it to 11 Bits and may be change the bit order.
Electromagnetic Design and Simulation :: 03-23-2017 20:41 :: erikl :: Replies: 7 :: Views: 786
Generally if the code exceeds the memory limit. You get this error. You can reduce the code size and verify if it goes off.
Microcontrollers :: 03-22-2017 15:32 :: electronicsman :: Replies: 1 :: Views: 353
Are you using a BAV20 diode for D4?
There are specific guidelines for connection and layout to the V pin:
In order to reduce the no-load input power of TOP264-271
designs, the V pin operates at very low currents. This requires
careful layout considerations when designing the PCB to avoid
noise coupling. Traces and com
Power Electronics :: 03-18-2017 16:21 :: E-design :: Replies: 10 :: Views: 682
program was working but one letter after next letter moving is not continuously not moving some
No video, not clear, no effective help. Anyway, considering that the linked code was abusing on the use of delay functions, did you even try to reduce its value ?
Microcontrollers :: 03-16-2017 18:13 :: andre_teprom :: Replies: 1 :: Views: 437
Different implementation methods for thermal vias have their pros and cons, see this recent thread:
Solder paste patterns are used to reduce the solder amount for large pads. In the present design, it looks like the QFN pads get potentially too much solder (paste pad reduction may be suitable) and the
PCB Routing Schematic Layout software and Simulation :: 03-14-2017 08:50 :: FvM :: Replies: 7 :: Views: 693
First you need to reduce your code to the minimum.
The start to implement your first task.
Debug it, make it run.
Then start to inplement the next task (only if the previous running as desired)
If you encounter a problem, then give detailed description.
Post the code, tell us what you expect it to do, and tell us what happens instead.
Microcontrollers :: 03-14-2017 07:05 :: KlausST :: Replies: 5 :: Views: 496
I do not design opamps, I just select one and use it. When you learn about opamps you will see that they have a very high voltage gain of 100,000 to 1 million without negative feedback and an output resistance of maybe 75 ohms. Then when negative feedback is added to reduce the gain and reduce distortion the output impedance becomes extremely low.
Analog Circuit Design :: 03-11-2017 02:43 :: Audioguru :: Replies: 5 :: Views: 495
You certainly do not want to reduce the battery 'wattage'. What you need to do is limit the current the LEDs draw from it. As already stated, the easiest way if you are not familiar with electronics is to use a series resistor.
The value (measured in Ohms) should be:
(battery voltage - LED voltage) / LED current
and the resistors power rating (m
Elementary Electronic Questions :: 03-08-2017 09:26 :: betwixt :: Replies: 5 :: Views: 679
Are you sure it is not another way around? For vertically polarized patch you can change horizontal beam width (the wider the patch the narrower the beamwidth) and can not change vertical beamwidth. To reduce further vertical bemwidth you need to make array of two patches - one on top of another.
RF, Microwave, Antennas and Optics :: 03-08-2017 01:48 :: AndreyG :: Replies: 2 :: Views: 641
Your simulation uses a pre run time to achieve steady state, you didn't mention this fact and hide the simulation command.
Unfortunately the simulator chooses a larger automatic time step to reduce simulation time. Try with a maximum time step of 1ns or so.
Software Problems, Hints and Reviews :: 02-23-2017 22:22 :: FvM :: Replies: 3 :: Views: 739
It's not impossible to use a PTC for the intended purpose, but its parameters must be matched to coil current and activation time. The choosen type is simply unsuited, looking at the operation time curve in data sheet clarifies why.
You should however consider that a suitable PTC protection device will also reduce the coil current by some amount
Analog Circuit Design :: 02-07-2017 08:02 :: FvM :: Replies: 9 :: Views: 776
You cannot do it directly but you may reduce the input voltage of this regulator ( mV uV range ) to a reasonable level then the task is easier.
It will consists of simple CV/CC adjustable regulator.Look at in order to find a proper element ..
Analog Circuit Design :: 02-04-2017 15:08 :: BigBoss :: Replies: 3 :: Views: 557
pls .. I need some one help me by sent to me code in any method like genetic algorithm or any method to object reduce power loss in radial system .. the topic .. optimal placement and sizing distribution generation ..
Digital communication :: 02-03-2017 18:40 :: ahmedisam :: Replies: 0 :: Views: 668
I have seen something like this in the past, and it was due to noise getting back into the ramp generator.
Its the same identical ramp that is supposed to drive both alternate cycles steered by a flip flop.
A quick and dirty fix is to reduce the resistance of the timing resistor, and increase the value of the timing capacitor by the same amount
Power Electronics :: 01-30-2017 06:28 :: Warpspeed :: Replies: 2 :: Views: 615
I want to train my support vector machine to classify human vs non human using matlab. In training phase am getting a large feature vector matrix around 1*335214 for a single human image. Is there a way to reduce the feature vector size or to select the location of human alone?
Digital Signal Processing :: 01-24-2017 10:41 :: emerson_11 :: Replies: 0 :: Views: 737
I've designed a fully differential op amp
but my common-mode gain is large
how could I change the parameter to decrease my ACM to -20dB at DC
Thanks for the reply..
below is my hspice code
.subckt op vdd vss vip vin vop von vcm clk
M1 3 vip 1 vss n_18 W=20u L=1.5u m=
Analog Circuit Design :: 01-22-2017 08:40 :: gn7623233 :: Replies: 1 :: Views: 593