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Hello, Is there any tool that can transform python code for Machine Learning into VHDL (preferably), so that can be uploaded to a Xilinx Spartan 3E FPGA?
Hello. How to highlight all differences in the layout as "flattened" and not as "hierarchical"? I'm using Calibre XOR + rve.
Hello everyone, I design a simple flyback converter and assemby in PCB. My transformer etd29, primary indutance around 400uH and 40Turn, secondary is 9Turn. But when I drive UC3845 around 10V y applying external voltage from power supply not from line. There is some oscillaiton in PWM signal, as you can see in my attachment. Can anybody commet t
how can I calculate the returnloss theoritically depending on the simulation results
Hi All, this is a picture of a rowing machine. 158436 I assume inside the machine there is a wheel at the place marked around the red circle in this picture. I am wondering for the machine with this kind of closed housing, is there any way we can use a sensor outside it to detect the rotation of this wheel? The rotatio
Dear All We are planing to make a robot which can treat corona patients remotely Currently we are getting ready to control robot using drone transmitter Can I have the idea and support to automated it using machine learning like neural network and deep leaning like tensorflow We need to drive our robot in the hospital which has word and (...)
Hello everyone. I have designed two power supply circuit, which is below. 158437 158438 these two power supply is generated using 12V. I need to know the time to reach the steady-state voltage. Do i need to calculate the RC filter. and if so what value of output resistance should i consider? a
I am designing a traditional 1st order delta sigma modulator. I tried to find the input referred noise of the integrator and switching network (circuit is shown). I set vin+ = vin- =vcm & then I set v to be a square wave at a frequency fclk/2 (to emulate the limit cycle behavior of first-order delta sigma for code 0). This is my periodic steady sta
Realtek's AmebaIoT ecosystem also has the low-cost Ameba-2 development board using the RTL8710 soc. This board is also a WiFi capable, Arduino compatible IoT board designed for project integration. The RTL8710 soc is tightly integrated on a small form-factor pcb module together with a USB to UART converter and a RGB led. The module can also be plug
Hi, TI has given LF398 bxl file and STP FILE Now Install Ultra Librarian and Export LF398 bxl FILE TO oRCAD. Then Open ORCAD CAPTURE -------> file menu------>IMport design------> BROWSE ALL THREE FILES, PRESS OK ORCAD .OLB LIBRARY WILL BE CREATED, LOAD LIBRARY JOB IS DONE, mAKE SURE IT IS sIMULATION MODEL. YOU WILL GET exported file from
Hello all, I am trying to model a frequency tripler in VerilogA by using and modifying an upconverting mixer model ( also in Veriloga ). Instead of multiplying the baseband signal and LO, I am multiplying an input 9GHz signal in order to get an output signal of 28GHz. For the mixer model, there is a parameter about the mixer gain ( which (...)
Project Description: A simple beginner Arduino project utilizing a little bit of code, 2 LEDs and an Arduino. Before starting the project... 158433 Welcome to our first Arduino project where it's for mainly beginners and newbies to electronics. This is a simple LED project where modifications can be widely perfor
Project Description: A simple beginner Arduino project utilizing a little bit of code, 2 LEDs and an Arduino. Before starting the project... 158430 Welcome to our first Arduino project where it's for mainly beginners and newbies to electronics. This is a simple LED project where modifications can be widely performed to
description: In the IP design stage, sometimes there is no actual foundry-library to test IP performance, so will use similar foundry-library (or even any foundry-library) for testing. IP test points are: highest frequency, area, power consumption. As for area, we can use '2-input-Nand' as the unit area, and calculate the gate-count for the area
I want to measure the IP3 of a Sample and Hold (clocked) using Cadence Spectre. What is the best procedure for this ? QPSS or PSS ? I want to sweep over input voltage. Thank you.
i am doing time interleaving data conversion. i want to demux 16 sinusoidal signals into one signal - what is the best way to do this? thank you.
Hello , yes i had a little biasing problem where i put Vdc in port 0.8 and for some reason it biased 1.6V on the gate as shown bellow. i Have succseeded building those circles and i picked a point in between the NF circle an GAIN circle and the GAMMA is GAMMA_S(as you said) Next i calculate from GAMMA_S yo GAMMA_L extract the impedance (...)
Hi We are doing a 12kW power supply by paralleling over 40 DCDC modules. This question is not specifically about the modules. It is rather about the nature of ?circulating currents? in such large systems, and how they can be mitigated. The power supply will be made of ten ?blocks? in parallel. The blocks are shown in the attached. Obviously
Hello, hope everything goes well, and covid19 will stop soon.. I am very new in Verilog, use xilinx vivado 19., want to add ddr3. what a problem cannot understand.. clock wizard and mem modules done normally step by step as in instruction..code i got from https://nu
Hi all, first post, don?t know if correct topic, For these kinds of questions, I would have usually asked a professor of mine but Corona is a bummer and he is not able to respond, your help would be greatly appreciated. I am quite a novice in electronics design and finally mustered up the courage to ask these (probably) dumb questions. I?m cu