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20 Threads found on edaboard.com: Sample Rate Converter
The datasheet of PCM1808 contains table 1 found here on page 11. It lists the possible sampling rates as 8, 16, 32, 44.1, 48, 64, 88.2, 96 KHz. It then lists the master clock values required for these different sampling rates. If we look at it e.g 16.384MHz master clock can give 32KH
Hi, How do you do the downsampling? Why is it necessary? Do you use an extra sample rate converter, then look into itīs datasheet about noise, harmonic distortion and other introduced errors. To calculate the FFT frequency resolution you need the downsampled "sample rate". about zero (...)
Hi all I will a masterclock output double with 2 comparators. The frequency is 24Mhz. How must I make the right choice for a comparator ? This is to separate the input of the sample rate converter and the dac. thanks.
The Atmel ATmega series offers a maximum sample rate of 15kSPS at a resolution of 10 bits. Reference: ATmega32(L) Datasheet, Section: Analog to Digital converter, Page: 201 ? 10-bit Resolution ? 0.5 LSB Integral Non-linearity ? ?2 LSB Absolute Accuracy ? 13 μs - 260 μs
Where or what documentation did you read the phrase "DAC 40/1024?" What is part number of the component to which the phrase refers? As both milind.a.kulkarni and rhaynes mentioned 1024 most likely refers to a Digital to Analog converter with 10 bits of resolution, 40 could represent the maximum sample rate in either kilo or mega (...)
sample frequency or conversion rate is the speed at which the converter outputs a new binary number. Sampling rate - it is the rate at which the ADC took analog samples . Technically it is the rate in which the sample and hold circuit takes data (...)
Hi , could anyone tell me which configuration mode should i use to program amp and adc. Also,Spartan 3an's user guide (ug334) i can't understand somethig ...page 76 , figure 9-6. At sample point i turn off spi_sck and for many cycles? Manual says that the maximum sample rate is approximately 1,5Mhz. I suppose that is logical because the (...)
Dear All, I am trying to implement a CIC compensator with the following parameters, MultirateType: 'Rational sample rate converter' Response: 'CIC Compensator' InterpolationFactor: 2031 DecimationFactor: 1250 Specification: 'Fp,Fst,Ap,Ast' (...)
Hi. Could you help me, please. How to implement Matlab nonuniform sampling (time-varying sample rate converter).
In the design of DAC , we can usually see the sample rate or update rate, for example , A 14-BIT 200 MS/S DIGITAL-TO-ANALOG converter. So, I want to ask that if the 200MS/S uprate means that the establishing time should lower than 5ns(1/200mhz)? thanks !
How about Analog Devices AD9211? This is a 10-bit monolithic sampling analog-to-digital converter with 250 MSPS sample rate.
In ADC what we see is the the sanpling rate of the converter... If our sampling rate is Fs then the sampling time is Ts = 1/Fs. this what the samples per second. but in digital domain... we will map a sample with some no of bits... for example 8bits per sapmle... So now we talk about the term bits per (...)
You should set the sample rate value in MATLAB to be the same as your hardware. Yes you should apply a window before doing an FFT of data with a non-integer number of samples. Your hann() code looks fine, but you assign the resut to data2 which you don't use anywhere. Different window functions give different sidelobe attenuation. You (...)
The sample rate must be greater than twice the signal's bandwidth.
Hi You can change sampling rate in MATLAB using resample function. y = resample(x, p, q); Changes sampling rate of inpu,t p/q times the original sampling rate. Regards
It is common practice to put an analog bandpass or lowpass filter in front of the A/D converter to prevent unwanted aliasing. After the signal is digitized, your DSP can do whatever sample rate conversions you need, but be sure to preceed each sample rate converter with a suitable filter (...)
I'm using dfdp4 package to design a sample rate converter to upsample samples at 7200 samples/s (modulated at 1800hz) to samples at 8000 samples/s, but I don't know how to set the different paramaters, like passband and stopband cutoff frequencies. (...)
Please, I am trying to acquire a databus (12 bits) from an A/D converter (with sample rate configured at 50MHz) using SPARTAN IIe and IO buffer configured as LVTTL (SLEW) in the input pins of UCF file (ISE 6.1i). Is the LVTTL (SLEW) IOB fast enough to be activated by the databus at 50Mhz ? Or I should replace the LVTTL IOB (...)
If you want high performance, you will have to have a receiver bandwidth wide enough to cover the TX and RX frequency errors plus the modulation bandwidth. Then bring this to baseband with a quadrature down converter feeding two ADCs. You will have to sample much faster than the Nyquist rate. Then do a DSP algorithm that looks for (...)
How about audio sample rate converter ? 44.1KHz -> 22.05KHz It's easy. On 2002-04-11 08:18, krespomx wrote: hi i looking an aplicattion to build a digital filter!!! any type, just for learning, purposes!!!