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23 Threads found on edaboard.com: Sar Example
I have a question about sar ADC with radix less than two. For example, if the radix is 1.8 to provide redundancy, when we combine bits together, do we have to have floating point calculation in digital part to calculate the total result? ADC output = 1.8^N*Bn + 1.8^(N-1)*Bn-1 + ... + B1 Thanks, Neo
I'm not familiar with fully differential ADCs. For example, the following two ADCs: LTC2389-16 - 16-Bit, 2.5Msps sar ADC with Pin-Configurable Analog Input Range and 96dB SNR Pin-Configurable Analog Input Range: ?4.096V Fully Differential 0V to 4.096V Pseudo-Differential Unipolar ?2.048V P
Hello everyone.. I'm new in this domain so please be patient with me. I have a problem in sar calculation in CST. The situation is next one: For o monopole antena for example when i define as a discrete port giving the coordinates: X1: -(r+d); X2: -(r+d); Y1:h/2; Y2:-h/2; Z1:0 ; Z2=0 for 900 MHz the length of monopol antena is lambda/4 = 8
Hi, I am designing a sar ADC. I designed a MOM-cap for unit capacitor of DAC by myself which is not provided by foundry. I have created a symbol and layout view of capacitor and in an example schematic connect the cap symbol to an inverter and in layout connect inverter layout to the cap layout. But when I want to run LVS, Assura can not recognize
Hi all, Does anyone of you have any example of a common centroid layout for the capacitor array used in a 9-bit sar ADC? The binary weighted array is listed as below: 16C, 8C, 4C, 2C, 1C - 1C(Split Capacitor) - 8C, 4C, 2C, 1C, 1C
Google PhD thesis on ADCs, you'll find plenty! Don't forget to specify if you want flash, pipeline, folding, multi-step, sar, delta-sigma...
Hi, Anyone has information about calculating Specific Absorption Rate (sar) by using Finite-Difference Time-Domain for a specific part of the body (for example head)? I have some papers about this topic, but want to know how should i start? This is what i understood from the papers: First i should have a human body model and then tissue proper
Is there any tutorial or example on modeling sar ADC using Simulink? Not that I know of. My capacitor array uses dual-sampling method which is different from the basic array, so I have to code my own block? Yes, every design is a little different so you better do your own model in order to capture th
Hello . Any one can provide example using verilog to interface 10 bit sar ADC parallel out to cpld/fpga and out put i2c data ? Thx .
hi there i think you can draw a line or curve along which u want the sar values and then in post processing ask it to calculate sar value along this curve or line i hope this helps regards
Hello . Any one got example of 8051 interface to 10 bit sar adc parallel/serial ? Regards.
as we all know, the dac output is just the input of comparator. my ref volt is 0~2.5V,so the mid-volt is 1.25V. 1. For example ,the 1st sampling point is 1.4 (p input) and 1.1 (n input), 0.3V differential, so the initial input of comparator should be 1.1(p input of comp) and 1.4 (n input of comp). but my value is ~1.09(just ok?!), and ~1.34 o
hii.... i nd some helps in fidelity... can any1 help me wit dat?? can i draw a human head model for simulation in Fidelity?? coz i nd to calculate the sar value.
Hello guys . Wanted to design serial 8/10 bit sar ADC ( something like AD7995 4-Channel, 10-Bit ADC with I2C-Compatible ) . But I am more towards analog , know little about digital ? Anyone got example ( state-machine/verilog for the control etc ) to do something like AD7995 ? May be I will do it without channel ? Single input enough but need examp
Have any design example for sar ADC?
Hello . How do u simulate , hspice and calculate for 10 bit sar ADC , ENOB and SNR ? And example of matlab , ENOB and SNR ? Regards.
Hello . I need some example to implement fsm and verilog of Successive Approximate Register ( sar ) , example 74C905 . Anyone did it before ? Regards.
Hello all . Need help from u guys ? I am trying to design a comparator for 10bit ADC sar . I am using 0.35u technology proses . How do I adjust/or change the circuit design to be a 10bit comparator the able to handle diff Vin+ and Vin- ~ 1.5 mV . Hope u guys can show which part to change , if possible with calculation example ? Thx in adv
You cannot say that the antenna will be small because is X-band antenna ! the size of the antenna depends on the beams that you want !! for example X-band are the sar antennas (flat antennas typically, but ome are reflector) and the size of these antennas are in the range 10-6m in azimuth and 1.5-2.5m in elevation ! they are not small antenna.
Dear all In using hfss, I find HFSS-->Field-->sar Setting. But I dont know how to calculate sar using HFSS. I have some question about it. 1. is it realizable to caculate sar in HFSS? For example, gsm900/1800/1900 handheld phone, How long will it take to finish calculation, with(3.2GHz CPU and 2G Ram) 2. Doyou have some (...)


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