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Hi What I mean is this - I design and layout a complex, multi-purpose, circuit and it works OK. I then decide to use the layout for a sub-set of the the original functions. I can do this by simply crossing out bits of the schematic on paper, and not installing un-required components on the board. But I would like to edit the schematic, and h
Hi, I want receive dcf77 at 77.5Khz But at 79Khz I have strong signal noise. I need a band pass filter of bandwith 100Hz max. I think to use the classic circuit preamp with cascade jfet and in the drain the LC resonant circuit (L with troid ) . example this circuit
Hi , I have designed the output matching with CPWG(cpw with ground) line and L,C component. 126734 126731 126728 126729 But the result of EM-cosimulation looks strange and different from the result of schematic. (S(37,37) is for schematic, S(39,
hello I need schematic diagram( or better service manual) for board symbol "B 109-901" . This board is in TV Thomson model "40FS2244" This schemat is very hardly found. I was looking in net , but I did not found If someone maybe help me , please send for my mail. Than you.
Hi All would anyone be able to help me out, or point me in the right direction of some documentation for this, i have searched the web and read through xilinx documents but cant seem to find an answer: i have a project for targer XC9500 series CPLD, has top level shematic and a pin.ucf file. in order not to clutter up my only schematic i open
I think that split plane you might be connected to "no net". Same problem facing here. Solution: Create a fake net(just a single-small wire) in schematic,give a net name. Same net name assign to the split plane.
greets to all.please i need a schematic drawing for sansui model rz-6900 av its a lightning strike.thnx in advance
Dear sir, I am really sorry I can't post the code or schematic here, But the circuit contained a linear pot with LM393 comparator. Thanks again reply Maxim
Hello, I am trying to make a Discrete DSB modulator without transfmormers fpr a single frequency around 9MHz. I have found some interesting schematics on the net. I would like your ideas of how to transform them to use no coils as well. For example on the varicap schematic how should I re
The TL431 will work the way you have it hooked up. I just tried it with hardware and a variable supply. I find it's a good idea to install a safety resistor inline with the led. In your schematic I would start by making R4 470 ohms. You will have to adjust values, in order to find a range where led brightness changes sufficiently to affect the p
In the circuit below which is attached are all MOSFET bulk connected to each other? if yes are they connected to most negative part of circuit -Vss? How can we distinguish these kind of bulk connected MOSFETs, in other words, how their schematics is drawn? 88466 The mosfet schematics 88467
Hi I am using TINA version 9 to simulate a tank circuit...can anyone tell me how to make a variable inductor in TINA schematic...where is that option? Also where do I find the option for filter design?
Hello here is schematic how C1 works in Circuit?
hi, please go to schematic option--> preference and select intertool communication
Hi can you help me, i need any kind of adapter schematics, pinouts, wiring for xeltek programmer adapters.
i m using AT89S8252 microcontroller chip for my project now i don't find that IC in any nearby shop.. can i know which is the equivalent IC of this AT89S8252?? After reviewing the schematic, you most likely could substitute the more commonly available AT89S52 for the AT89S8252. The design in the schematic does n
Hi everyone, I have another problem, again... I have obtained a CDL netlist and a spice netlist from my verilog netlist. I used v2lvs to generate the CDL and SPICE netlist. Firstly I tried to import the CDL netlist into IC5. File-->Import-->CDL, then I tried to input the CDL into a library which contains all the std cell schematic. The t
how can i optimize input LNA match in momentum or after layout craeted . . . . . as a schematic the match works f9, when i make the layout and put it there the results differ very very widely i have separated the input match , how can i optimize it , now i have this setup term=50ohm---------input match --------term=15.14+j42.4 ohm
There must be a low resistance path for current at the output node, other than the cascode paths. Can you post your schematic? It's very hard to say without schematic.
When you create a PCB footprint, you assign a number to the pad you have created. So the pin number in your schematic symbol has to match with the pad number in the footprint.