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105 Threads found on edaboard.com: Self Test
self-made a three-digit display capacitance test table 136092
Use an inductance meter. The VNA is useful for measuring the self resonant frequency not the inductance. The Q is easier to measure with a VNA. Resonate the inductor with two known high Q capacitors at the freq of interest and measure the -3dB bandwidth of the network. Then use the relation Q= Fc/BW and solve for BW. The caps should be connected i
This is a problem with many layers to it. You need physics-of-failure, reality-based electromigration coefficients from some reliability test that can let you figure interconnect life based on current density and local temperature (I have seen many tests conducted (heh) poorly, failing to figure in self-heating let alone measure the worst (...)
Just wondering how an automatic self-test can perform and work on AFCI units. I can understand the push button test but for the unit to on its own create an arcing simulation or am I missing something here on the self-test part?
I have a PCB(test bench), which has "contacting device"(Socket) to holds the ICs(without soldering). The "contacting device"(Socket) consists from "pins". Effect of these "pins" I want to consider when simulating PCB in ADS. I have a graphics S21 and S11. And self Capacitance of pin: 0,47 pF self Inductance of pin: 1.44 nH I have (...)
It is useless to synthesize a design before verifying its functionality. In order to do this you need to write a test-bench that will simulate your design. Best would be a self-checking test-bench which apart from writing in and reading from the FIFO, should also test its overflow and underflow conditions.
One way to test Ambient light is to pulse a reference LED onto the ambient light sensor to indicate minimum LUX level threshold. Then if sensor gets dirty from a spec of dirt the size of sensor chip <1mm it will be self calibrated by 5mm emitter pulses. Using S&H analog switch and logic you can design it to idetect if ambient less than nearby REF
Unless you get these in ceramic, I wouldn't hold my breath on how long they will work for cryo temperatures in a plastic sealed case. That being said, I was surprised once when asked to test a hard disk drive to see if it would fly ( 1um) at -40'C and complete power on self test ... for the military. The bearings squealed a bit, but it (...)
Hello! Usually DR oscillators are put in enclosures. Can we guarantee frequency operation stay in range of about 100 MHz if we do not use enclosure? For example, in active integrated antenna (AIA), where oscillator itself is an radiating antenna without enclosure. In many AIA antenna used as resonator, so there is no any enclosure. What if we add D
keep in mind that inrush current is pretty fast so you need a current probe with sufficient bandwidth. transient protection needs to be measured in such a way that if the system fails to self protect, then your test method is not allowed to deliver desctructive energy. for example, if you were measuring transient overvoltage, it would be good i
Take a look at the following excerpt from High Performance Memory testing: Design Principles, Fault Modeling and self-test By R. Dean
I would like to know about self-verifying test bench for verifying HDL based designs (either Verilog or VHDL). I know that we usually, manually define the test stimilus but I was asked to come out with a self-verifying (Selbstprüfende in German)test bench. Can someone share your idea? thanks in advance.
I need to perform the self-test on MPU-9150.But i dont know how to configure the self test control registers? can anyone help me? Thanks in advance.
You may be seeing circuit self-oscillations. Is your layout prepared for GHz frequencies? Avoiding resonant loads?
Well, same remark, what to you want? BIST is Build in self test, means logic added to check macros/logic. a Bist to check the logic will be memory consumming, because you need to save the stimulus patterns and the result patterns to know if the logic is clean. BIST is generally associated to memory. The scan chain number is determined by the nu
The great problem is reflections from the building its self, this leads to cancellation of RF fields at some points and addition at others. The complete inside of your test area must be covered in some compound that exhibits the impedance of free space ~ 377 ohms. this is so any bit of RF when hitting a wall does not see it as a wall but as free sp
#mrflibble, I presume he is asking for a self test routine. #mtdanaras, If it is the case, there is no mistery : You need just perform recursive Write/Read patterns, alternating between "0000...." and "1111....". Further refinements could be added such as mapping failures location and and accounting percent
Any one can help me on d8-11 imv ups showing "battery charger error" on display during self test. i check. bat. charger deeply n found ok. saeed.
Does it POST(Power On self test),i.e.. can you see anything displayed on your screen,if not then you can use a POST card to debug the problem .If you don't have a POST card or don't know how to use it ,you can disconnect all the devices like RAM ,HDD, CD ROM etc from your motherboard ,then by starting with RAM connect each item one by one and see i
ADXL203... accelerometer IC. The IC needs a 5V supply. Is this the voltage you are giving it? It has a self test pin. (I don't know how this works.) Have you tried it? Did you get a definite result? What output do you get? Is it 0V or 5V? What happens if you shake the IC? It's possible that this will cause the oscilloscope trace to jump enough