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1000 Threads found on Simulink Sigma Delta
Hello everyone, I need some help in designing a DAC. To my understading aftre going through I drew this block diagram(attachement). They are few questions I couldn't able to sort it out 1. How to decide the resolution of DAC? 2. I am thinking of using split array charge scaling architecture. Is it going to be better option considering layout
I would like to discuss about resistor mismatch citing a very old post, even when I was not a student of Electronics. The post link is here: Resistor matching calculation Let's say, I have two equal Resistor (R1, R2), 10k each, having a standard deviation
156390 Sometimes the delta S value in HFSS is shown as N/A. What causes this?
Thanks a lot. I will try this point in simulink Simulation and let you know the update.
Hi, How to measure phase current waveforms for delta connected motor using current probe with oscilloscope? How to connect the scope probes? Thanks
Hello, Can anyone help me to know that is it possible to implement any ADC on FPGA board by using Verilog code? Or should i have to go through circuitry, and here i am not talking about implementation of onboard ADC or some external readymade ADC .
Hi, we measure stability of a circuit in terms of phase margin and gain margin in analog circuits where as for RF circuit analysis kfactor >1 and delta <1. In some way, is there any relation between these two?
Hi, I want to measure phase voltage of bldc motor which is having delta connected system. Since there is no ground terminal in delta. I am confused to measure the phase voltage of motor with oscilloscope. Can anyone tell me how to connect the channel probes to measure phase voltage of delta connected motor?
Please find the circuit attached. I used the below link for reference but I got an error saying the the block in empty and hence no output could be plotted. I am trying to capture a step response and then use it to calculate transfer function for the same. If any one is able to produce the the frequency response please upload the video or steps.
Dear friends, it is know that shorter channel transistor is faster than with longer gate. This I can understand well when we talk about NOSFET working as a switch. But how this concept affect the speed of the operational amplifier where GBW = gm / CL for example. If you tell me that shorter channel leads to higher gm I can say that gm can be
For a 10bit resistor string DAC, if the INL is required to be less than 1LSB. Why the resistor mismatch delta(R)/R< 1/(2^9)? Why not delta(R)/R< 1/(2^10)? Thank you.
Hello, I am designing 3rd Order, Single Bit, CIFF Discrete Time sigma delta Modulator. How to select the capacitors sizes for this design ? See attachment. CT - total of ff - feedback capacitors. I know how to select CS1 based on my noise requirements. But how do I select the other capacitors sizes like Cff(x) and Cs(x) etc. Th
Hello all, I'm designing a 16bit Audio delta-sigma DAC using 180nm technology. The purpose is to learn how to make a delta-sigma DAC at the first try while high performance is not a concern. therefore I chose 44.1KHz as the input sample rate without using oversampling. I have the bitstream now but I can't filter it out. Do (...)
Howdy, I have been searching the internet for days now.. Still not finding what I need.. I am looking for a list of good brands for DC-DC power supplies.. When looking for AC-DC, my go-to is MeanWell and delta.. I have no clue for DC buck/boost.. Just because the product has 'good quality' in the sales description, does not make it so..
I have seen several posts about PWM in order to make a one phase inverter, and most use a long values table calculated to get the sine wave, 154902 but what if it calculates the duty value each time? I have a graph where can be seen some details, but I don't see the way to attach it. There I see I will have
If I want e.g. 28-bit accurate A/D conversion by multiple conversions and averaging, what is the optimal A/D converter - so that total conversion time is the shortest?
Hi everyone! I am choosing three-phase diode bridge rectifier now. I'm trying to understand what current is present in datasheet for such devices ? the average current of a single diode or output bridge current. Can anyone help me with that?
Hello all, Quick question about power combiners using: wilkinson, branch line, and rate race. We are working at power levels of 30-35dBm, and I was worried about the power ratings for the resistors in those types of power combiners. For the branch line and rate race, assuming a pretty decent match to the coupler, the resistor should be isolate
I have a DT DSM with 3rd order loop filter with CIFF architecture. In Si, the low frequency noise floor is seen to increase from the idlechannel noise floor when some input sinusoid is applied to the DSM. The amount of increase in the noise floor is proportional to the amplitude of the input applied. The noise floor doesnt change with any change in
// If (asynchronous reset & write_en) are true on the same clock, and then reset is low on the next clock, // then the asynchronous reset gets ignored and the write_en applied Could anyone explain the above comment statement in asynchronous reset b