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The RC circuit that smijesh added is extremely important to soft-start the circuit and prevent gate-source breakdown.
There are different kinds of MSS related to FPGA implementation: 1)soft ip 2)hard ip Hard IP means that MSS is implemented on silicon in addition to FPGA fabric. The Hard IP of Microsemi are: ARM-Cortex-M3 (implemented in product SmartFusion 1/2) and ARM7 (was implemented in some Proasic3 product). soft IP is a source code that can be (...)
Can anyone Help me in providing me the soft copy of the book Analog IC'S by Paul Gray. or provide me the snapshot of the the Circuit diagram of Fully Differential Folded cascod with source degeneration and common mode feedback found in the some last chapters of Paul Gray.
Hi I think it's not software problem. 1. Check your VCC & GND voltage? 2. Check your crystal output with oscilloscope? 3. Check MCLR pin for high.
Hi, When i import a design into SDK (ISE design suite 14.7) and create a board support package, i get the error below: Staging source files. Running DRCs. Running generate. Running post_generate. Running include - 'make -s include "COMPILER=mb-gcc" "ARCHIVER=mb-ar" "COMPILER_FLAGS=-mlittle-endian -mno-xl-soft-mul -mxl-barrel-
Hi, I'm looking for an open source PCI Express (PCIe) soft IP core that will run on a Lattice ECP3 FPGA. I need to be able to run a PCIe Gen1 x1 endpoint, and if it has a DMA backend or Wishbone interface, that'd be awesome. I've looked on OpenCores and searched on Google, but so far I haven't found a good solution. Does anyone have a recomme
I have a project regarding visual tracking using DE2-115 FPGA development board.. I need a verilog code for that. source codes for digital image processing are mostly usual to find implementations available on the Web wrote in C/C++ languages. You could consider employ at your design some soft core processor d
No, it is not "open source", but you are allowed to use it for free in Xilinx devices. If you want a soft core processor you can use for free in any device, look at Mico8 or Mico32 from Lattice, or the OpenRISC processor.
Hi everyone. I'm trying to compile an open source project and run it on a Nios2 soft-core processor running uClinux. I should already add here that the program was not originally written as an embedded application. The project contains round 50 files so there is a lot of compiling. So I compile all the files individually using Alteras Nios2 g
It's intentionally low. The datasheet explains why, look e.g. for the soft start circuits.
What is soft substrate pins in Layout?
I bought FGA15N120 igbt (six peices) for making a voltage source three phase inverter. I found that its suited for soft switching.Whereas my design is for hard switching. Will this be a problem? Please help... Hi vinu gopalakrishnan Not it wouldn't be any special problem . by the way i've saw it's datasheet from fairchild semicon
Guys need your suggestions: I have an application where I have to Switch power to load ON/OFF with a soft Start and soft Stop. At 24VDC the load current is around 9A. For Power source I have a SMPS with 24V output with adequate current supplying capacity. Now I have to choose the switching device. Since the load is inductive (A PMDC (...)
What are you particularly searching at the forum? Why don't you consider the Ferroxcube soft Ferrite Databook as your first information source? You'll find e.g. pulse/general purpose transformers as one of the suggested 3E25 applications. For detail questions, you'll want to refer to the material data.
Hi to all, I started to develop a STM32F4-Discovery soft Synth. A video showing it's first beta release is here: The project will be released as open source Can someone give me some suggestion for the next release ? What kind of features to add ?
how to make virtual serial port using soft serial library in arduino 1.0 IDE.Actually i am able to send from arduino UNO to GM862 QUAD but there is no response from GPRS module.can i get source code for making virtual serial port using softserial library whcih is available in Arduino 1.0 IDE.
i have some nmos with b-s connection, instead of bulk to ground. ... the pwell is still isolated in my opinion. The source of this NMOS -- connected to its bulk, as you say -- must of course have a defined potential (more positive than ground). Otherwise calibre detects a soft connection to ground via the n
I am not sure which FPGA are you using. But Lattice has some good 8-bit soft cores. Check out : LatticeMico8 Open, Free 8-bit soft Microcontroller
I designed a panel with a Direct-on-line method using a soft-starter to run my Blower Motor but was having problem getting 380V- 400V at the output of the soft- starter, instead, am getting 345V-350V at the output of the soft-starter that feeds to the Motor. Should I connect the source voltage input fisrt to the (...)
I haven't come across any Open source PowerPC soft cores, I'm sure it would be viewed as a copyright infringement by IBM, Motorola and Freescale. There are however several OpenSPARC soft cores available which can be implement on Xilinx FPGAs. OpenSPARC