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176 Threads found on Spi Bus
I2C speed is actually limited by the bus capacitance, although "cut-off frequency" isn't the usual term.You find respective calculations in the I2C specification by Philips/NXP. Due to the fact that the specification has fixed speed limits of 100/400 kHz, bus capacitance isn't a problem for usual applications. spi can be implemented with (...)
spi is Serial Peripheral Interface bus, invented for inter chip communication by Motorola. Although not impossible in principle, it makes little sense to use it inside a chip.
I2C is open collector outputs so that you can have multiple devices on the I2C bus and is thus limited to 400Khz or so, spi selects each device with its own enable pin and is much faster more than 25Mhz. The idle state depends on the settings of the spi bus and can be programed to be any state that is compatible with the (...)
During the design devices we added modules on the spi bus. PCB now looks like this. spi CLock track on PCB have now 106mm and connect three module (yellow arrow) On each module have PCB track 40-70mm. For example from bottom to top 1. LAN module with MAC and PHY ENC28J60 ( minimum comunication over ALN 2. TFT LCD with (...)
Hi folks, I am working on a project where there are few spi memories on the bus. To have a cold sparing, some memories are turned off with an aim to be turned on when there is a problem with the power ones. I have tested few spi memories, but whenever you have unpowered spi device on the bus, the lines (...)
i want to extend my spi bus running at 500 khz to 1 meter using am26ls31 and am26ls32 ic, can i do this kindly explain.
The description in your post is correct, but not implemented so in your code. Wrong spi framing for the cascaded bus. You should take CS low, write 4x16 bits, take CS high. LOAD_LO and particularly LOAD_HI must not appear in write_register(), it's only used once for the full frame. And NO_OPERATION() should only perform one write_register().
1) What is a "daisy-chainable" ADC? If you're using spi, all the devices can share the bus, with discrete select lines. 2) Look at Microchip MC3008. It's about $2 in single pieces.
Can I use I2C and spi device on the same bus ? I want to use PIC18LF4550 for my project. It has only one spi / I2C bus and the pins used are common. So, can I use a spi SD Card and I2C DS3231 on the same spi / I2C bus ? The SD Card will have a CS line and I2C will have an (...)
74hc165 if spi if prefered
What are some modern fast/flexible Intermodule / PCB-to-PCB busses commonly used with FPGAs/SOCs? That is, buses that are off chip and off board. Some I can think of off the top of my head are. Serial: I2C, spi, and RS485: very simple but flexibility and speed are limited. PCI Express: Fast and flexible, but would need an FPGA on (...)
Compared with spi: I2C is slower (100kHz ~ 400kHz tops), spi could be faster (1 MHz or more), I2C uses only 2 wires, spi uses 3 or 4 wires commonly. compared with RS232(UART): I2C is synchronous, UART is asynchronous, I2c can have a lot of devices in the bus, RS232 is only peer to peer (2 devices per (...)
I believe, you can find out how many 512kBit EEPROMs are needed to store 1.7 MByte of data, either using a pocket calculator or pencil and paper. Unfortunately, you can't address more than 4 devices on an I2C bus. There's no simple solution using serial EEPROMs. My suggestion would be a 16 MBit serial spi flash, if you live with page wise erasur
if I were to guess, you have some noise coming in on the spi bus, and it resets the state of the synthesizers, or goes from transmit to receive, due to the corrupted register values.
Actual data rate is 80 rather than 100 Mbps due to 8b10b encoding, but of course can't be transported through spi. If you want full ethernet throughput, you'll go for a processor with tightly coupled network interface like Arm, PIC32 or wahtsoever. The spi connected ethernet chip will be typically used with small processors that can't transport
The interesting parameter is the actual spi bus clock frequency, not the maximum rate of 75 MHz. You should also probe the CS line.
You see anything from a few MHz to 50MHz or more depending on the parts in question Devices operating with the conventional standard spi need pull-up resistors, which makes the bus somewhat "weak". For frequencies above the MHz order, must consider use an electrical standards based on differential pairs.
Hello, I am using this PICAN board for my project I would like to write ultrasonic sensor values to the can bus which in turn communicates to the second node.. I have tested spi loopback using this code
Hi, I wonder if i can connect spi Flash (this ) directly to standard spi bus of a CPU ? CPU spi bus has only one data line. I use parallel NOR flash as a booting memory. I just want to use spi flash as a real-time memory
Hi, I am about to use a CAN bus with raspberry pi. The idea is to write ultrasonic sensor distance values to the CAN through spi. I have tested loopback with CAN . There is a driver for python which is Socket CAN . Unfortunately this doesnt work (i could not import can module in python). Another way is to use C (By using wiring pi, spidev (...)