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1000 Threads found on edaboard.com: Sram Library
Hi, TI has given LF398 bxl file and STP FILE Now Install Ultra Librarian and Export LF398 bxl FILE TO oRCAD. Then Open ORCAD CAPTURE -------> file menu------>IMport design------> BROWSE ALL THREE FILES, PRESS OK ORCAD .OLB library WILL BE CREATED, LOAD library JOB IS DONE, mAKE SURE IT IS sIMULATION MODEL. YOU WILL GET exported file from
description: In the IP design stage, sometimes there is no actual foundry-library to test IP performance, so will use similar foundry-library (or even any foundry-library) for testing. IP test points are: highest frequency, area, power consumption. As for area, we can use '2-input-NAND' as the unit area, and calculate the gate-count for (...)
Hi everyone, I have recently bought an STM32 Nucleo-64 G474RE. I want to use this MCU for Field-Oriented Control (FOC or Vector Control) with a BLDC motor. I have seen there are many libraries available and there is the ST Motor Control Workbench tool available. But I am confused as to which tool and/or library I should use with this board. I ha
Greetings ... comment that I am with a small project in ISE 14.5, I have managed to synthesize but I am having compatibility problems with the ipcore fifo_generator 9.3 when implementing and I am having one of the errors. ERROR:NgdBuild:604 - logical block 'u_client.U_client_ff' with type 'g1_ipcat_wbus_client_fifo' could not be r
Where can I find these optic components ? in ADS 2015 Laser, Photo Diode (PD_Pin_EF), Fiber optics cable (Fibre_opt) in such attached screen shot Thanks in advaced. 158352
Dear friends, I found this cell from analog library of my foundry, it is classified as wide band amplifier, my question what the thing makes it wide band, what this architecture named so I can make further research on it Thank you Best Regards 158302
Hi, I'm trying to do load pull in Virtuoso, but I can't find the "portAdaptor". It should be in the rfExamples library, but I can't find that library. How should I fix it?
Hi, On startup ESP-01 MODULE, the LED1 connected at PIN GPIO-0 gets ONCE blink even writing HIGH digitalWrite(BUTTON,HIGH); // Have to write this pin high before entering the void loop otherwise this pin will be grounded in void setup(). After that the code is working as expected (Button press LED1 OFF and release LED1 ON. My
Here is simple code written to communicate with I2c device. I could not able to get any Start bit.weather below code is correct. I have used MCC generated code library , #include "mcc_generated_files/mcc.h" #define PFS RB0 #define RESET1 RB1 #define SELECT RB2 #define ADVANCE RB3
Hello, does anyone know where to find the Process Documentation for tsmc's 0.18um BCD process ? Is this an official data sheet-like document from TSMC? Does anyone, by any chance, know if there exists any third party documentation for this process, say authored by some cool electronics engineer dude that took the effort to go into the details and e
LM317 is one of the most popular adjustable regulator chips. The output voltage of the regulator can be adjusted from 1.25V to 35V. However, the chip can deliver currents up to 1.5A which is not enough for some power applications. In this article/video, I will discuss two methods of LM317 current boosting, using power PNP and NPN pass transistor
Can simulator like ncverilog simulates the metastability behavior of CDC circuits? How to do simulations with metastability models (RTL and gate-level)?
After designing an IP, you need to estimate the area, maximum frequency, and power consumption. As for the IP design level: the area can be estimated using the nand numbers; the highest frequency, given the process library, run the estimation using design compiler tool. But for power consumption, is there some good software for power analysis? I
Hello. I have problems in understanding patterns, generated by TetraMax ATPG. I have simple circuits (from ISCAS benchmark) with full-scan DFT. And when I dive into patterns (.wgl or .stil) I see some strange things. 90% is predictable and clear to me: scan_select is set to "1" (we are in scan shift mode). we set up register va
I am looking for a reference design for creating several linked lists pointing to a shared buffer/sram space. Tried to search for papers/ college classes but can't find a reference design. Basically I have several Input buffer queues, storing requests: e.g. 6 Queues, with 10/3/8/32/16/64. Linked list points to a sram for storing queue entries. Q
Hello all, I have vcd file now I want to feed it to the analog environment or say cadence virtuoso environment.How do I do it. Thanks in advance
Greetings ... tell you that a couple of days ago I am going through a VHDL project made in Vivado 2017.3 to ISE 14.5. Several of these sources had vhdl 2008 syntax that ISE does not recognize, I could correct some of them, but I am having problems passing the SLL operator of VHDL 2008 to its equivalent shift_left in VHDL 93. I leave attached the l
Hey Guys, I am new to edaboard and ARM microcontroller. I happened to encounter the following two macro definition in HAL library in STMCubeMX. First: #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uin
Anyone using STM32CubeMX with MDK-ARM Pro components? For example I use CubeMX for inicialising STM32F103 and generate project for Keil v5.27 from MDK-ARM I want to add for example graphics library emWIN. MDK-ARM include Manager for Run-Time Environment or I can add emWIN manually or .... In short, what is the best way to try these things?
I've been doing a lot of survey article for fanout for design compiler. But for some technology process such as 90nm/.18um , our target library (.db / .lib) has already the settings of max_fanout/ max_capcitance for our design, but in 4x nm process, I can't find the max_fanout in .lib file 1. Is that the reason for settings ?? (But how to determi