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## Stability System |

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stability control system , power system stability , ads stability , stability bandgap

151 Threads found on edaboard.com: **Stability System**

How did you do for **stability** analysis in **system** level?

Analog Circuit Design :: 01-18-2011 07:37 :: leo_o2 :: Replies: **2** :: Views: **670**

I am sure all the poles and zeros has to be on the same side of plane! Now if you want a stable **system** in addition to minimum phase, obviously the poles and zeros have to be on the Left side of the plane. Since the question only asked for minimum phase and mentioned nothing about **stability**, option 3 is the answer!

Analog Circuit Design :: 01-10-2011 11:16 :: ayo_oc :: Replies: **2** :: Views: **625**

Slakware Linux
The Official Release of Slackware Linux by Patrick Volkerding is an advanced Linux operating **system**, designed with the twin goals of ease of use and **stability** as top priorities. Including the latest popular software while retaining a sense of tradition, providing simplicity and ease of use alongside flexibility and powe

Linux Software :: 01-03-2011 15:13 :: teddynalias :: Replies: **0** :: Views: **975**

Hello, everybody! I wanna ask a question about the **stability** about the negative feedback **system**, shown as the
As the book of "Signals and **system**s" said, if all the poles of a **system** transfer function are in the left part o

Analog Circuit Design :: 11-29-2010 09:42 :: lily1981216 :: Replies: **7** :: Views: **882**

does anyone know the **system** design and test about mems gyro(sensor + asic)?
i want to make sure two question:
1) what equipmet needed to measure a mems gyro?
2) how to measure the following parameter:
a, linearity
b, zro **stability**
c, rate noise density
d, vibration sensitivity
e, angular rate cross-sensitivity
th

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 11-18-2010 09:56 :: robicyang :: Replies: **1** :: Views: **700**

dddddddddddddddddddddddddddddddddddddd

Digital Signal Processing :: 09-30-2010 04:40 :: gpffhdnzz :: Replies: **0** :: Views: **903**

It is reasonable that you get different results with the second loop open or not, as you simulate a different **system** in the two cases! When you break a loop, you calculate the open loop transfer function for this particular loop. Then you use this open loop gain to estimate phase and gain margins usually using **stability** rules based on Bode diagrams

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 09-28-2010 11:06 :: kgl_13gr :: Replies: **6** :: Views: **1382**

The main problem with using multiple stages is maintaining **stability**. Anything more than 2 stages and you would have problems compensating for the multiple poles in the **system**.

Analog Circuit Design :: 08-22-2010 12:03 :: checkmate :: Replies: **10** :: Views: **8313**

Analog Circuit Design :: 08-15-2010 08:47 :: FvM :: Replies: **7** :: Views: **982**

Hi,
I am interested to know,
which plot(Ny, Bode, Nichols, RH, etc) of control **system**s will be more accurate and absolute in describing **stability** (Open loop and for closed loop if compensator is added) of a **system** and why .......?
*All plots are (resp. can be) "accurate".
*However, if you are interested in sta

Analog Circuit Design :: 05-28-2010 09:13 :: LvW :: Replies: **1** :: Views: **813**

You can have small signal **stability** and large signal in**stability**.
If you have BJTs, look for saturation at / just beyond OP, which
can swing capacitance quite widely relative to small signal
values.
Is the oscillation related at all to the Class D chop frequency?

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 05-19-2010 01:36 :: dick_freebird :: Replies: **6** :: Views: **1111**

The Power Amplifier gain is part of the RF **system** analysis of the entire transmitter chain.
The gain and loss of each transmitter stage should be distributed from the modulator up to the antenna.
The gain of the power amplifier is limited by different factors, as **stability**, number of internal stages, input available power, etc.

RF, Microwave, Antennas and Optics :: 04-28-2010 05:09 :: vfone :: Replies: **2** :: Views: **886**

Hello all,
I have a question concerning the **stability** criteria of **system**/circuit that always bothered me.
Q:
A bode plot where the phase response toggles from 180 to -90 (or anything negative for that matter) while the gain response remains above 0dB is representative of an unstable/oscillating **system**. Does the same hold true if the (...)

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 04-16-2010 02:49 :: rover8898 :: Replies: **2** :: Views: **769**

Hali Zoli,
Seems me that the grips are to short (for me with ca. 4-5cm shorter as wished) to have enough **stability** & force for driving out a fixer screw...
As kit is good one selected **system**, but a category smaller as I would buy for general PC mountings.
Greetings!
Karesz

Elementary Electronic Questions :: 04-06-2010 20:10 :: karesz :: Replies: **2** :: Views: **699**

Increasing the BW will reduce the phase noise if VCO is the major noise contributor (which is true in most cases). But the limit on BW set by Fref is not based on phase noise but on **stability**.
1. The loop TF assumes a continuous **system** gradually becomes invalid in Fref<10*BW. One could still have a stable loop, but the analysis requires z-domain

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 03-18-2010 08:40 :: saro_k_82 :: Replies: **3** :: Views: **1262**

I think stc 8051 chips are also equivalent to ATMEL chips and furthermore stc is of good **stability** and anti-jamming ability : )
Agent of stc chips in Shenzhen,China. : ) contact me at

Microcontrollers :: 10-16-2009 03:00 :: Amy&MCU :: Replies: **3** :: Views: **2489**

Vovan76, the reason you check **stability** at 0db gain is that, as was said before, the denominator of the gain becomes 0 and the closed loop gain is infinite. That means, even with no input applied, your **system** will produce some output (because of noise, disturbances etc.). This is of course valid when you have an inherent inversion in the loop and y

Analog Circuit Design :: 09-04-2009 17:22 :: sutapanaki :: Replies: **14** :: Views: **4753**

what is meant by impulse response? why we use it to study to character of the signal that is study the linearity,**stability** etc? why it is called ideal **system** to study?
plz help i hav read signa sys,control etc but i hav yet not understand this problem

Elementary Electronic Questions :: 06-08-2009 14:14 :: sayurabh :: Replies: **7** :: Views: **1633**

hello all my friend!
I am learning about of temperature control using microcontroller. I have a problem to control the **stability** of the **system** in desire set point temperature using PID control method. How to find or simulate a K,Td and Ti parameters of K-type thermocouple in Ziegler and Nichols open-loop unit step response testing. Can i us

Hobby Circuits and Small Projects Problems :: 04-22-2009 11:20 :: aungkyawmyo :: Replies: **0** :: Views: **3620**

Actually not right. Theoretically, the limit for **stability** is phase margin of 0. Phase margin of 60 and more simply means that the step response will have very little or no ringing. Phase margin of 45 is generally considered as the lower limit for good behavior meaning there is quite a lot of ringing but it can be ok if sin signals are processed. N

Analog Circuit Design :: 04-16-2009 22:48 :: sutapanaki :: Replies: **10** :: Views: **1405**

The **system** is a three-stage-inverter tia(trans-impedence amplifier) with multiple feedbacks.The feedbacks are between every two of the three inverters.
How to show that the **system** is stable?The simulation tool I used is Hspice~

RF, Microwave, Antennas and Optics :: 04-15-2009 11:24 :: kibby :: Replies: **0** :: Views: **819**

Dear mates,
I've started a project for developing a wearable pulse oximetry **system** for remote monitoring purpose. The idea is provide the wearer with the maximum level of comfort and freedom while maintaining the **stability** of the displayed data. In this regard, I am going to design and test a pulse oximetry sensor as a finger ring. However, befo

Digital Signal Processing :: 02-16-2009 15:02 :: mmaah :: Replies: **0** :: Views: **1298**

we can see some poles n zeros of **system** easily to check abt **system** **stability**

Digital Signal Processing :: 02-11-2009 08:46 :: xulfee :: Replies: **4** :: Views: **4694**

If it is unstable, it means that it will be unstable from the smallest change (noise) in the circuit. As well from the input side or the load side.
Only in theory, a ball can stay on the top of a mountain. The smallest breath of wind will cause tha ball to roll down.
The only solution is to design the **system** with enough **stability** margin.

Elementary Electronic Questions :: 01-11-2009 18:06 :: svhb :: Replies: **2** :: Views: **1635**

why it is necessary that region of convergence of any stable **system** must include unit circle in z plane?

Digital Signal Processing :: 11-25-2008 20:31 :: nabeel_uet :: Replies: **2** :: Views: **2254**

Basically the transient response will be affected by the closed-loop **system** bandwidth. This is equal to the crossover frequency of the open-loop **system**. So the compensation has to be done in such a way that you have as large bandwidth as possible, while still meeting the criteria for **stability**:
sufficient phase margin
sufficient gain (...)

Analog Circuit Design :: 11-10-2008 17:36 :: VVV :: Replies: **4** :: Views: **1774**

in case of **system** represented by a transfer function. the roots of the denominator are eigen values and their value is important to gain insigh in the **stability** of the **system**s. i think they have other advantages also but cant fgure it out..
regards

Elementary Electronic Questions :: 10-16-2008 07:55 :: sohailkhanonline :: Replies: **5** :: Views: **2428**

Does SPICE simulation include the high order (high frequency) poles/zeros effect in converter **system**?
I have a boost converter **system** with variable load. I have compensated the loop with heavy load and the crossover frequency is about 15% of the switching frequency. Then I found when the load is light, the crossover frequency increases a lot, even

Analog Circuit Design :: 10-14-2008 10:20 :: kkkhunter :: Replies: **0** :: Views: **971**

Hi all,
I need analyse a close loop **system** **stability**, so I use .lstb command in ELDO.
My test case circuit is very simple as attachment and my commands according to eldo's manual are:
vstb v1 v2 dc 0 ac 1
.lstb dec 100 0.1 1g
.plot ac lstb_db
.plot ac lstb_p
However I found the dc operation point is not correct. I

Analog Circuit Design :: 09-23-2008 06:57 :: trashbox :: Replies: **0** :: Views: **1881**

It is said that a good current mode controller (two loops) will cancel one pole at output and make the **system** stable. Is that real? any papers talking about that?

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 08-14-2008 05:59 :: tdy :: Replies: **0** :: Views: **749**

The **system** is usually 2nd order, so the **stability** is easily predicted. The PD would use a charge pump, so the filter will be RC series. To improve the reference rejection, a small capacitor, C/10 is connected in parallel to the resistor. This reduces a bit the phase margin but greatly reduces the reference leakeage.
The software from Analog Devi

RF, Microwave, Antennas and Optics :: 08-04-2008 12:59 :: Eugen_E :: Replies: **1** :: Views: **804**

In current mode DC-DC converter, there is a OTA , that is gm , which connects a resistor with a Cap for compensation. All we know this combination is compensation for **system** **stability**.
But what is the spec for this OTA ?
Does this OTA need to follow AC **stability** criterion ? That is the phase margin should be large than 45 degree ? (...)

Analog Circuit Design :: 07-10-2008 12:11 :: pianomania :: Replies: **0** :: Views: **996**

To RFDave,
Talking about the first question it is very simple case. AM have nothing to do with BER and its degradation. LO in**stability** consideration is also not for this case. Anybody who try to use SSB receiver to listen AM station knows this effect.

RF, Microwave, Antennas and Optics :: 07-05-2008 21:56 :: RF-OM :: Replies: **31** :: Views: **8871**

hello
how to ensure **stability** for battery charger **system** when battery represents huge capacity load?
regards

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 06-10-2008 16:36 :: jutek :: Replies: **0** :: Views: **665**

What kind of long-term **stability** do you want to design your **system** for? In other words, how long of a GPS outage should this **system** be able to coast through? How inexpensive do you want the whole **system** to be? What types of scenarios will this **system** be used at? These are the most critical parameters. (...)

Robotics and Automation Forum :: 03-11-2008 20:25 :: kender :: Replies: **2** :: Views: **1274**

Because in the transfer function poles occur at the denominator and for s = sp where sp represents a root at pole the tranfsfer function goes to infinity which leads to in**stability**. Zeroes, on the other hand occur at the numerator and for any finite value of s transfer function cannot go to infinity. Hope it helps.

Elementary Electronic Questions :: 03-11-2008 10:02 :: subharpe :: Replies: **1** :: Views: **1009**

Hi, could anyone tell me the risk and usage of conditional **stability** in op amp design?

Analog Circuit Design :: 02-03-2008 06:10 :: rachel607 :: Replies: **2** :: Views: **1262**

when a zero is added...the root locus of the **system** ...moves to left of s=jw plane...hence **stability** increases....
when a pole is added the root locus of the **system** moves closer to s=jw plane...(assuming pole is not added far away from origin.....)hence **stability** decreases.....
any control **system** book can (...)

Elementary Electronic Questions :: 01-02-2008 13:20 :: sridhara :: Replies: **5** :: Views: **12011**

Does anyone know how to analyze the **stability** of chopper amplifier?
suppose the chopper amplifier has 3 stages.
if we just remove the chopper switch, and analyze the **stability** of the rest circuit, is it ok?
please help me.
Thanks.

Analog Circuit Design :: 01-02-2008 03:15 :: iamxo :: Replies: **5** :: Views: **1232**

Hi all ,
Can any one give me the references for doing the **stability** analysis if there are multiple feedback loops (i have two feedback loops in my circuit ) in circuit ... Thanks in advance

Analog Circuit Design :: 12-20-2007 06:15 :: haribabu :: Replies: **1** :: Views: **1094**

We need phase margin of **system** greater than 60 degree for **stability**.
How to understand phase in simplest way? look for the performance of a circuit how to know how much phase it need. Any one has intuitive understanding.
Thanks

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 10-30-2007 16:19 :: bicave :: Replies: **2** :: Views: **854**

Gain and phase margin are a measure of the **stability** of a feedback device

Elementary Electronic Questions :: 10-23-2007 19:57 :: cesare :: Replies: **5** :: Views: **5361**

please give me a hand:
Why PLL do not oscillate when open loop gain > 0dB with its phase is around -180 degree in low modulation frequency?
Look at the closed-loop poles instead! If any closed-loop poles are in the right-half plane the **system** will be unstable. Open-loop analysis for **stability** can be confusing unless you

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 09-20-2007 20:27 :: doho :: Replies: **2** :: Views: **872**

hi,shanmei
In your figure , the **stability** is not a problem, and make a notice that the PM is at the lowest point of phase at the condition of (MAG>0), not at UGB because of existence of zero. As castrader said, design the circuit with z1 and p2 both away from UGF will be better, this will not bring out the p-z doublet to propagate the respon

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 08-03-2007 04:42 :: caosl :: Replies: **7** :: Views: **1211**

I think you should study theory of control. because you will meet the question of **stability** when you do dc/dc. The most dc/dc is a nonliear **system**, and is feedback loop.

Analog Circuit Design :: 08-08-2007 13:59 :: watersky :: Replies: **12** :: Views: **1716**

I have heard from some people that we can add a pulse signal to detect the **stability** of a feedback loop, I want to know how to do this, Where to add the signal , how much the rise time ,fall time, width and magnitude?
Is there any paper talk about it?
3x!

Analog Circuit Design :: 07-09-2007 08:01 :: didibabawu :: Replies: **1** :: Views: **880**

The steady state error for these two alternate inputs can be zero, a fixed value, or one growing with time depending on the order of the **system**.
Is the **system** highlighted above G(s)? But from Nyquist analysis, the closed-loop **system** is found to be stable. Do you mean Nyquist analysis will not hav

Elementary Electronic Questions :: 07-01-2007 23:41 :: powersys :: Replies: **2** :: Views: **1295**

As documents you ploted said. :
A **system** should only be analyzed for
**stability** using the Bode plot, if it has at most
one phase crossover frequency. Additionally,
if it has only one gain crossover frequency
and the amplitude ratio as well as the phase
angle are decreasing at the gain crossover
and afterward, then the gain and phas

Elementary Electronic Questions :: 06-26-2007 09:01 :: ramberwang :: Replies: **14** :: Views: **24088**

To ensure **stability** you have to look at both: Phase Margin and Gain Margin and as I understood in ur case the gain margin will be in negative meaning that ur **system** is unstable.

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 04-21-2007 17:44 :: MSSN :: Replies: **3** :: Views: **1390**

Frist of all, it's not **stability**. To have **stability** issues you need a closed-loop **system**. Your current mirror is a replica-bias mirror, which simply means create an output current source based on matching of components between the Iref and Iout.
Notice that the current through M9 is no way dependent on ANY other voltages/currents except (...)

Analog Circuit Design :: 04-24-2007 10:20 :: gszczesz :: Replies: **4** :: Views: **1156**

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