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42 Threads found on edaboard.com: Standar
Some interface standards based on RS-485 like PROFIBUS are specifying galvanic isolation and don't need a ground wire. They still have a shield, but it's not connected through a signal pin. Non-isolated RS-485 needs a ground wire for reliable operation.
Hello, I've designed a digital core with ARM front end standard cell and an analog circuit in cadence Virtuoso in IBM 130nm. I wanted to do the mixed mode simulations in virtuoso. However, the ARM front end standard cells doesn't provide any information inside. Could someone please help me in doing simulations with front end standard (...)
Hi all, I am doing the final project of my career of telecomunications, and I need demodulate and if is posible modulate a digital video signal from/to the standar dvb-t. I am trying do this searching libraries in simulink (Matlab) and I have started to work with this demo:
Hi Dear Gentlemen, I start long time ago this thread . Now, I've sold this old thread and I've started a new project. Because I repair some old TV in B&W from 1940 to 1970 with vaccum tube, I needed to build a video scaler from Color PAL 625 line to B&W 819 line French standart. It was the
HI how to make the cells in the box in below image in a single row (like in standard cells)
Hello, I have a doubt regarding the reverse direction data transmission in high speed serial links, such as MIPI's Display Serial Interface(DSI). Typically, in a DSI, image data is sent from the host chip to the device chip(Display unit), as low voltage high-speed differential signal(serial bits are transmitted). However, the standard also al
In bit-banging I2C operation, you'll usually drive the pins by the direction register, leaving the output latch in low state. This way, the output changes betweeen output low and tristate. According to I2C standard, both SDA and SCL are operated this way. If none of the involved I2C slaves is performing clock stretching, SCL can be operated push-pu
Does anybody know if there exists an application for such LPF??? I know how to do that filter with a very wide rejection band and distributed elements, with a small size. Im looking for standar information (wi-fi,BT,WiGig,...) but there is no physical specifications for channel filters , where could I find it??? TY!
i've read that the value of standar deviation AWGN is 1. How come we get it? ?
i've read that the value of standar deviation AWGN is 1. How come we get it? ?
Hii, I did the interfacing between PLC and microcontroller. I use LG PLC series Master K and Microcontroller Basic Stamp series BS2P. At first i wanna communicate using standar serial UART 232, but I tried to find the ladder function of this but i didn't find it. So I did it with my way. I use Parallel interfacing ( not port paral
Hii, I don't whether you have check it or not, parallel is divided into 3 : 1. standar parallel port 2. Enhanced parallel port (EPP) Check your BIOS setting for this, EPP has capability for read and write, But standart Parallel port just write ( can' read). And I if you are using VB 6 in
hello. Can anyone tell me where to find the most usual voltages (Vgs, Vds , id...) for diferent nmos geometries? I know that there are many diferent variations for the same technology but i need the most standar. i think 0.90 has 0.9V Vgs.... thank you.
dear asic_eng i wll try to answer ur question though not sure if this is the correct one. There are generally 2 kind of supplies for a ful l.. IO's power and standar cell power. The standar cell power is less compared to IO's power. The io pads which are attached to io pins these days have a layout which as more than one metal later runn
Hi Guys, I am not clear about pin assignment to i/o in your design in xilinx environment. First of all does it really give you a big speed advantage if you assign pins to i/o in your design? If so, how to make a good pin assignment to i/o in your design? e.g,) i am working on AES (advanced encryption standar) in xilinx ise. I
I want to model on the softeware Optisystem the various standards,using a LiNb Mach-Zehnder Modulator, and a PD. The signals I want to transmit are CDMA,GSM,WCDMA and so on. During the simulation, I find that in the receiver it is diffcuty to separate the signals.I try to use filters to separate the signals, but this method is failed. Does
Hello all. I have a project and at this moment i need to design a circuit that mainly contains CPW, transmition lines, connectors and substrates. I need also to put the dimensions of each of these on it. My supervisor told me that should be in GDSII format because its an industrial standar. Do you have any good and easy to learn pro
Hai all... butuh bantuan nih.. sy lagi ngedesain blok pengkodean untuk standar DVBs2 menggunalakn Matlab,,yg menggunakan LDPC encoder+interleaver+BCH encoder (diblok transmitter)..sedangkan diblok receiver kebalikannya (BCH decoder+deinterleaver+LDPC decoder) masalahnya keluaran dari BCH decoder ga bisa dilewatkan ke blok deinterleaver...kare
Hi.. i want some help on matlab code. Ι want to find the Symbol Error Rate of Binary FSK through an awgn channel, for SNR. The error probality has the limit of 0.001(=> N=10^4 ,is the Number symbols simulation). Also the the signals are sinus, with standar period and frequency... Now i am learning matlab and i don't know how
Hi all, I'm planning to design my digital controller using 65 nm CMOS process with standard VDD of 1.2V. But I'd like to make it lower, say 0.6V-0.8V. What factors should I consider before I can decide what voltage to use? I'm thinking of the maximum speed required for the controller (in my case, it's about 10 MHz). Can anyone help me ou