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Does anyone know where I can find a tutorial about how to use the stb (stability analysis) function in Cadence? open loop gain close loop phase margin and how to measure the offset?,
Hi From my experience it is a though job to do stb analysis (ac-based analysis) on a whole buck DC-DC system, because it is a complex system with PWM involved. What you can do, and is usually done, is model all your analog components (opa, comparator, reference) on stand-alone, and then design your feedback network based on your input specificati
I had enough trouble from the stb analysis (coming up with absurd operating points and giving way-bogus loop gain) that I gave up on it and went back to old school methods. You just can't trust it to work each and every time, like you need to ever get through your Monte Carlo compliance analysis.
You didn't reveal which analysis tool you're using. If it is Cādence SPECTRE, insert an iprobe instance in series with Cf, run an stb analysis and plot gain & phase.
hi,everyone: I'm doing a Complex BPF,but I don't know whether it is stable?How to determine its stability? I have done the transient simulation with a input of step signal,there is a ringing at the output, but I think the reason is large capacitances' charging in the circuit. Meanwhile, I have done the stb simulation with t
Hi, Can ADS simulator do a loop stability simulation like spectre stb? Thanks!
I find the stability analysis (stb) tool convenient yet untrustworthy. If there is anything "funny" it will give you results that don't make sense without saying why. Always look at the simple gain / phase frequency analysis plot if you have any doubt at all about reasonableness.
Your circuits are topologically different in the compensation so why do you expect identical response? I'm not a real big fan of stb. When everything is right it's a handy shortcut. But determining -whether- things are right, is still easier for me using AC analysis and transient. Get the circuit working without the iprobe and then figure out wh
Did you use "stb" analysis? It is more accurate than "AC" analysis. Where did you break the loop? Pls also try to break the loop at N5, or N1, or N2. There are more than two loops. stability is complex.
Yes, please use stb analysis in cadence ADE. For hspice, you have to do AC analysis.
Hello , When I use stb to analysis a multiloop circuit, for example-- a bandgap with the OpAmp topology. There will be at least two loops exist in the circuit, right? When I use stb to test the loop gain for one of the loop (loop positive), in this testbench--do I need to break the other loop(loop negative) ? The (...)
hi,there I am designing a MDAC for pipelined ADC. The structure of it is plotted as attachment. My question is how to simulate the closed-loop gain vs phase of this schematic because it is a switched-capacitor circuit and decrete-time applied.Then,how does spectere do with its stb analysis with this circuit type?And I only need to add a cmdmprob
looks like this is long time ago. I don't think you have a loop in this circuit, unless you have a feedback voltage to control you are pumping or not, then you have a loop, for that loop stb, stable means less ripple on the output, unstable means more ripple on the output, you can calculate the delay from the output to the pumping arbiter, there
There is an analysis option "stb" (stability) which with the iprobe "widget" does it all; you can plot traditional Bode plots or a margin summary. Otherwise it's make the gain expression, use the "cross" function to find the zero gain, use that value as the argument for value() on the phase expression. At least, I've found no "canned
Like I write on my webpage , Tian's method (as I prefer to call it) is directly implemented in Cadence's Spectre simulator as stability analysis (stb), so there is no need to use the complicated formula. Regards, Frank
put an iprobe in series at the point where you want the loop to be broken and then do the stb analysis.
Hello Bharath.. Wht u have done is correct's breaking the loop virtually and it's one of the way for stability analysis... The easy way is connect the Vin- and Out put through iprobe (which can be found in analogLib) and add stb analysis ( what ever frequency range u want.) Vin+ is connected to a Ac Source with Ac magnitude =1
Replace the short between node VBE and the gate of TP8 with a dc voltage source (V1) with dc=0. Do a stb analysis pointing to V1. This should tell you the dc gain, PM and GM of the loop. To confirm it in the time domain, apply a small step disturbance on the supply (when the nodes are stable) and see how various nodes jump and settle.
Hi, I designed a simple cascode opamp and did the stability (stb) analysis. Mag and Phase plot is perfect. However when I get the stability analysis summary I am getting negative values for Phase margin and Gain Margin. The phase when my loop gain crosses 0dB is -93 degrees. However, in stability analysis I am getting (...)
Hi Include voltage source in feedback net. Star Cadence stb analysis. Regards