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142 Threads found on edaboard.com: The Designers Guide
See the followings.
Is there any way to simulate the hybrid parameters of the HBT transistor in ADS ? or is there any function in ADS that can convert the s-parameters to h-parameters ? My second question is about cut-off frequency. In the common emitter configuration, how can we obtain ft vs Ic in ADS ? (...)
I have a question relating to how an eye diagram is built step by step. I read documents about eye diagram. 1. For ISI, the eye is formed by: superimposing successive waveforms to form a composite image But, i don't know based on what criteria they cut a certain waveform of falling an
Is the above rule a sufficient condition for MIMO feedback stability?You can not understand contents I posted at all. Modern control theory is surely useful for judging stability of MIMO System. Your complex filter is formulated by using state space variable equations. So modern control theory is straight for
HI pancho, thanks for the links but let me ask you if you're posting those links randomly?What do you want to know ? Can you tell me where is those links are some useful information about how to get the fmax of a MOSFET?What do you want to know ? Evaluation of fmax is very easy. Sim
Regarding the gm/Id paper by Tiwari page 21, the needed gm was calculated to be 12.6mA/V then on page 22 the gm/Id is calculated to be 6.3 V^-1 when the max drain current available i
Hi, I am trying to do something new to an existing VCO architecture and I found an improvement in the phase noise. Though I am not able to mathematically (I am able it only intuitively) explain the improvement at this point in time, I would like to know if PSS results are accurate enough. the question might sound vague, (...)
Hi, all of the model parameters for any transistors are simulated and stored. there is a method for extracting the parameters in virtuoso w/ spectre. Maybe check this link: I remember doing this with a dc sweep simulation and then going to Results Browser and reviewing
Simply drive DUT by Iin or Iin_plus and Iin_minus. then measure Iout+j*Qout or (Iout_plus-Iout_minus)+j*(Qout_plus-Qout_minus). Here you should use PSS/PAC
Hey guys, I was wondering where a design variable "frequency" gets generated in transient analysis in Cadence ADE (spectre) when I do a transient simulation of a set of devices using only behavioral VerilogA models and a Ipulse/current pulse. All the items in the simulation are behavioral models, and there is no "frequency" (...)
See the followings.
A ring oscillator with an odd count of inverters will always oscillate, because of the 180° phase shift. If you want to add phase shift to your Verilog-A inverters, perhaps this example could help, s. pp. 199 ff.
I want to derive third order input intercept point (IIP3) for my designed low noise amplifier (LNA). What I observed in the many IEEE transaction LNA paper, they used Volterra Series Analysis for deriving the IIP3 equation for their LNA. Which is the best text book for deriving IIP3 for our LNA and where (...)
Hi, In Phillips' paper: am quite baffled by his comment "impulse response of the phase deviation phi(t) can be approximated with a unit step s(t)". Why and how to explain that? Further, how to derive equation (6) from
Hmm - the way you talk it sounds like you expect all these processes to act sequentially, like a C program. It wont. Have you got a sketch of circuit from before you write any code?
Does anybody download "Modeling Jitter in PLL-based Frequency Synthesizers" from and test it in cadence? How to simulate it? can you send me the project in cadence? thanks!
linting checks just guide to have cleaner RTL code, before to read them by synthesis tool. the synthesis tool will also indicate some warning and also errors about the RTL code. But some designers work only as frontend design and some ones as backend design (...)
Like if I'm doing a transient sim and my freq variable is "Freq" I'd just refer to the freq as VAR("Freq").Use xval() function. See the followings.
You are asking about other forums while already in a forum... Forum-ception!! Try this : the Designer's guide Community Forum
ic6 doesn't start I have installed cadence ic6 suse 11.2 when I type icfb& or virtuoso , cadence doesn't start and gives the following error Qt Warning: X Error: BadMatch (invalid parameter attributes) 8 Extension: 150 (RENDER) Minor opcode: 4 (RenderCreatePicture)