Search Engine

Three Way

Add Question

1000 Threads found on Three Way
Could anyone advise about the verilator width warnings below ? verilator -Wall --lint-only in_buf_load.v %Warning-WIDTH: in_buf_load.v:35: Operator ADD expects 12 bits on the LHS, but LHS's VARREF 'idx_n' generates 9 bits. %Warning-WIDTH: Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message. %Warning-W
Hi, I've searched through here and on google but haven't found anything about this. Typically, latchup is illustrated with nmos and pmos. The SCR is drawn based on those two devices. Is that to say that if the pmos was a p-diode or the nmos was replaced by an n-diode, there would be no latchup concerns? The question comes from some tests I've put
Good evening, I was designing a 2-stage OTA consisting of a folded cascode, as a first stage, followed by a common source, as a second stage. Almost all transistors, except one, work in saturation, then, between the first stage and the second, I inserted a common drain to perform a level-shifter, so that both transistors of the common source amplif
Regarding Scan Chain, why are we remove scan chain before the placement? and why are we reordering scan chain after the placement?
Is there a way I can use the programmer on the ATMEGA328P-XMINI to program an external ATMEGA328P on another PCB?
Hello, I am looking for best way (in sense of speed and simplicity) how to connect STM32 MCU to FPGA board (Artix-7). The comunication must be two-directional. I am experimenting with some kind of coprocessor for ARM CortexM4 core. The MCU is sending data to process for FPGA and after FPGA ended processing is receiving processed data. I try to f
Hey there I have an electrolysis cell to produce brown's gas from water, in the process, gas barrier decreases efficiency of cell while it may consume huge amounts of current too. So, I need to apply PWM pulses to increase electrode efficiencies and control current consumption in one circuit. I have this current limiter example [ATTACH=CONFIG
Hello, I'm working on flyback converter LTC3805 and i have situation when sometimes (one in ten cases) i get overcurrent protection triggerd and "hiccup" mode statring. there is no short-circuit, when i replace controller the circuit works fine. When i look on the primary current at the Oscilloscope i see every TSS t
Please help me regarding creating .json file using a excel file
Hello All, Am seeking some caps for a power filter at low voltage AC, per the title. Would consider 3 x 1200uF or even 5 x 680 uF AC.. The combined 3400uF should be able to handle 50A rms on a continuous basis ( motor start caps are out as too lossy, tan-delta = 10% ) any pointers to a solution welcome
The point is that the equation has no variable input, thus it can be calculated at compilation time and doesn't infer hardware. The equation has however multiple (three or so) solutions, I'm not quite sure how you want to present it. If you have a meaningful Verilog problem in mind, please share.
I am trying to build a robot which requires around 2000 oz-in of torque at speeds of up to 100 RPM. I was looking at the 3334 stepper motor, it can handle the torque no problem but says it has a max RPM of 25. Is this the max RPM at the continuous torque or unloaded? If it is at the continuous torque, is there a way to find out the actual max RPM.
Wien bridge need a non-inverting amplifier with gain around +3, variation range can be relative small. For clear sine wave output, a linear control element like JFET is preferable, I would even refer to an additional linearization circuit that superimposes half of the drain-source AC voltage to gate-source voltage, can be found in many Wien bridge
Dear friends, We need a closed loop amplifer connection with a gain=unity for the purpose of simulating the large and small signal response, I usualy do by using resistor feedback with RF=Rin. However I see some people are using capacitors as a feedback elements as shown below, which one of the configuration should be preferable and what is the
156616 This is the snubber circuit which I used to run an 230VAC induction motor. Input 230VAC is given to RL1-3(COMMON point of RELAY).But when we check the voltage in RL1-2(NO in Relay),Input voltage appears at this point also,even the relay in OFF condition. Due to this,the motor is started to run even the relay in
Hi, i designed a sinusoidal pwm amplifier (3KHz to 20KHz) that regulates its output voltage reading the RMS value of output current. The RMS is obtained squaring the signal sampled by AD converter @200KHz and then applyng a FIR filter with 120 TAPS. The advantage of this method is that the settling time of the FIR (so the response to amplitude c
Hello, as far as I understood you correctly - you waana design a matrix multiplier (2 dimensional arrays). You don't give many important assumptuions related to your design. We don't know how big can this matrices be? We aslo don't know how is type of data in these matrices - are them fixed-point or floating-point numbers. You are trying compare
First thing to check is whether you really have a controllable volume at all. There are three type of TDA7052, the original with no letter at the end does not have electronic volume control at all. SOME of the ones marked 'A' at the end have it, some do not. ALL the ones with a 'B' at the end do have volume control. So am i right to say tha
Page 252 of the PIC16F1508 datasheet suggests that the four PWM outputs of the PIC16F1508 must all be the same frequency. However, is their some way that this can be changed??eg one of the outputs made to operate with a frequency 2x or 4x or 8x less than the others? PIC16F1508 datasheet:-
This makes no sense. First you say you want to compare Vref with Vdd. Then you say you want Vref to CHANGE with Vdd. THEN you say a constant voltage is supposed to connect between the two voltages. These are three totally unrelated requirements. Are you, perhaps, trying to design a voltage regulator? Can you restate your question?

Last searching phrases:

throughout | forth | forth | seven | nobody | seven | nevertheless | last three | less than zero | forth