254 Threads found on edaboard.com: Transistor Analysis
I am trying to understand the "purpose" of different transistors in LM741. In the figure below,
- I understand that Q1 and Q2 form a differential pair.
- Q5, Q6 along with R1 and R2 for the resistor-ratioed current mirror. I am guessing their function is to act as load. Is that correct?
- Q7 is the base current compensating trans
Elementary Electronic Questions :: 04-02-2017 01:54 :: dzafar :: Replies: 3 :: Views: 574
Hello EE friends,
I need help solving this sample circuit for class. The photo transistor is responding to a 5khz photodiode not shown. I need help solving out for the output voltage.
My understanding is that the phototransistor will turn on and off at the same rate as the photodiode, and the signal created will go to the inverting op amp t
Elementary Electronic Questions :: 04-02-2017 14:16 :: PoS080 :: Replies: 3 :: Views: 504
You did not mention the bandwidth of the signal applied to that circuit. For circuits with reactive devices, you should consider the impedance in function of the frequency of the signal. Moreover, in your above calculation, it is not clear if you're aware of the maths that should be used: You cannot algebrically add a resistence with reactance, but
Analog Circuit Design :: 03-25-2017 08:57 :: andre_teprom :: Replies: 3 :: Views: 406
RF, Microwave, Antennas and Optics :: 02-16-2017 18:26 :: BigBoss :: Replies: 2 :: Views: 529
I don't understand two parts in my text book.
"for a simple common source How can we reduce the input-referred noise voltage? Equation implies that the transconductance of M1 must be maximized. Thus, the transconductance must be maximized if the transistor is to amplify
a voltage signal applied to its gate whereas it must be minimized if the tra
Mathematics and Physics :: 11-11-2016 10:28 :: fateme m :: Replies: 0 :: Views: 2017
Please take a look at this test
I'm doing DC analysis on the transistor to the left and transient analysis on the transistor to the right. I have fixed Vg to 1V and varies Vdd from 0 to 1V for DC analysis
Elementary Electronic Questions :: 06-28-2016 07:47 :: batibot323 :: Replies: 1 :: Views: 443
I need help in doing a large signal analysis on a three-stage
The first stage or what I'd call the threshold detector turns on when Vin or the voltage supply exceeds the transistor threshold voltage.
Analog Circuit Design :: 06-21-2016 08:38 :: batibot323 :: Replies: 0 :: Views: 319
I am wondering how Cadence compute VDS of each transistor in DC analysis for the circuit below.
Could you share how VDS is calculated here?
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 04-09-2016 14:29 :: anhnha :: Replies: 8 :: Views: 744
I'm using this formula fmax=rad((fT.n.L)/(8.pi.Rs.W.Cgd)) to calculate the fmax of an rfnmos2v transistor in Cadence, where fT=gm/2.pi.Cgg, n=number of fingers, Rs=sheet resistance, and Cgd=0.4f.W(in mircometers). W and L are clearly the width and length of per finger, and I'm using 180nm technology. Problem is, when I use sp analysis to view the f
RF, Microwave, Antennas and Optics :: 01-31-2016 13:10 :: Elecemperor :: Replies: 0 :: Views: 803
the phase magnitude plot doesn't seem to indicate a stability problem (see attached images).
To say so with some reason, you would have performed the AC analysis with a parametric sweep of output current set point. Did you?
The problem is that transistor gm varies with drain current, loop gain does respectively. In addition, larg
Analog Circuit Design :: 01-28-2016 07:10 :: FvM :: Replies: 17 :: Views: 1433
I am attempting to simulate the PLL phase noise in ADS using the available PLL blocks which I have implemented in transistor level in ADS. However, the closed loop analysis in ADS does not worked so I wanna do by adding the noise of each block to the s-domain PLL model but I don't know how?
Is there anyone help me with this problem?
RF, Microwave, Antennas and Optics :: 12-24-2015 15:40 :: MAHSA88 :: Replies: 0 :: Views: 560
You are calculating the ac resistance. There are lots of transitor parameters that will change between DC and AC situations. One basic difference will be due to the complex part of the transition impedance of the transistor. For example if the impedance is in the form of Z=R + jwX, since the latter part is frequency dependent, you will see differen
Elementary Electronic Questions :: 12-09-2015 12:14 :: kpc :: Replies: 4 :: Views: 723
Hello, i succed to simulate two monopole antenna in hfss but i dont understand the simulation results because i m beginner in hfss:
The difference betwen S11, S22; S21 and S12;
RF books will teach you about S-parameter. Guillermo Gonzalez, "Microwave transistor Amplifiers, analysis and Design, 2nd. Ed.", Pr
Electromagnetic Design and Simulation :: 12-02-2015 23:47 :: pragash :: Replies: 2 :: Views: 579
A transistor has exponential transconductance. Then without any negative feedback when the signal level is low the output is fairly linear but at high levels it is extremely distorted even if it is not clipping.
An opamp can have a wide frequency response at low output levels but at high output levels its slew rate limits its high frequencies.
Elementary Electronic Questions :: 12-01-2015 17:59 :: Audioguru :: Replies: 3 :: Views: 690
Hi i need to do the noise analysis for 4 quadrant multiplier. I just understood noise analysis is nothing but accounting for all the noise from every single transistor, resistor and other components. Kindly let me know if this understanding is correct. But i am confused how to do it and how first of all the graph should be. Becoz i found (...)
Analog Circuit Design :: 12-01-2015 06:56 :: preethi19 :: Replies: 0 :: Views: 382
Your circuit is absolutely symmetric. But the startup needs sone unsymmetry. In real world every capacitor differs from the other, every transistor differs from the other...
You can give your circuit a kick start with a pulse or just make it a little unsymmetric..
Try it and tell us if you see any difference.
Software Problems, Hints and Reviews :: 11-10-2015 21:28 :: KlausST :: Replies: 3 :: Views: 1096
I presume, you are reporting simulation results. Wouldn't it be appropriate to analyze the simulation in detail, e.g. look at individual transistor voltages and currents in the transient analysis to find out why the circuit doesn't behave as expected?
You have all the information at your fingertips, he have about nothing.
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 10-19-2015 15:50 :: FvM :: Replies: 4 :: Views: 596
I want equations ??
Samy, before continuing - are you sure about the circuit? My question is because, normally, in such a combination of two transistors the transistor Q2 is in emitter-follower configuration (64 Ohms in the emitter path).
Please, check again.
Analog Circuit Design :: 08-16-2015 14:46 :: LvW :: Replies: 13 :: Views: 992
This was our textbook in university :
Microwave transistor Amplifiers: analysis and Design by Guillermo Gonzalez (2nd Edition)
it's a very good book with detailed examples.
and this is another one :
Microwave Circuit Design Using Linear and Nonlinear Techniques , by George D. Vendelin ,Anthony M. Pavio, Ulrich
RF, Microwave, Antennas and Optics :: 06-25-2015 03:17 :: memarian :: Replies: 5 :: Views: 983
ATF34143 is an LNA (Low Noise Amplifier), and by definition any LNA should work in Class-A.
So, good PAE (Power Added Efficiency) is not the main target of performances of this transistor.
For best performances follow the Avago application notes 1190 and 1191.
RF, Microwave, Antennas and Optics :: 06-10-2015 17:04 :: vfone :: Replies: 3 :: Views: 497
I have searched lot in the google, I couldn't get it. I request you to show me document for the small signal noise equivalent model for CMOS transistor and HEMT transistor. If you know somebody, complete analysis document for the noise small signal equivalent model of CMOS transistor and HEMT (...)
Elementary Electronic Questions :: 06-06-2015 17:29 :: raju_kambar :: Replies: 0 :: Views: 522
Run a Monte Carlo analysis - if your transistor models include mismatch and/or process variance parameters - and display the delay measurement statistics ordered in your control file.
Analog Circuit Design :: 03-13-2015 12:40 :: erikl :: Replies: 1 :: Views: 506
It's essentially a system simulation problem because simulating it on transistor based is pretty difficult.
If you know PN behaviour of each PLL block, you can simulate them in a system simulator even in MatLab.
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 02-09-2015 22:42 :: BigBoss :: Replies: 5 :: Views: 1120
I have noticed in the google search and literature survey Small signal analysis and obtaining related equation of input and output impedance, gain, noise figure for MOSFET and JFET transistors. Similarly I couldn't find small signal analysis and obtain related equation for input and output impedance, gain, and noise figure of pHEMT small (...)
Elementary Electronic Questions :: 01-05-2015 03:03 :: raju_kambar :: Replies: 0 :: Views: 513
... when transistor is fingered, the resulting noise is up to 2x smaller than KT/C. for the others, the noise is pretty much KT/C...
In smaller node sizes, thermal gate noise voltage may add a not insignificant contribution to the total thermal noise. The main culprit for this contribution is gate seri
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 11-14-2014 17:36 :: erikl :: Replies: 9 :: Views: 1557
It depends on the tools and PDK. Some PDK's have different transistors in the library for monte carlo simulations. In other PDK's it's an option in the transistor properties.
In AdeXL you can also select which devices should be included in the monte carlo analysis.
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 11-04-2014 17:54 :: beetwee :: Replies: 8 :: Views: 1870
Monte Carlo analysis Histogram
Today at 11:34am Quote Modify Hi All,
I am designing a current conveyor and I am doing Monte Carlo analysis(by varying width and length of transistor) for Current gain , voltage gain and Rx,Ry & Rz. I am using code as given below:
Vdd 5 0 2.5
Vss 20 0 -2.5
Ib 0 2 100u
vin 7 0 ac 1 sin (0 100m
Microcontrollers :: 10-13-2014 18:37 :: zulqar :: Replies: 1 :: Views: 698
I have created symbol of a two stage opamp from schematic in Cadence Virtuoso . From ADE I am simulating opamp using its symbol . I want to get information about operating conditions of each transistor(like gm,vgs,vth,id etc) . How can I get these parameters and which type of analysis on symbol will yield these parameters? I tried but I am not gett
Analog Circuit Design :: 09-14-2014 13:46 :: zulqar :: Replies: 1 :: Views: 545
Here is my circuit and dc bias point
and here is ac output voltage
question 1:the output amplitude is too much higher than Dc input voltage what is my mistake or spice mistake?
question 2:if we want to find upper and lower frequency ( cutoff) we should calculate (1/sqr(2
Analog Circuit Design :: 08-27-2014 08:21 :: ehsantech :: Replies: 5 :: Views: 752
The relay contact at transformer secondary side seems does not make sense, due it is controlled by transistor output, which interrupts its biasing current.
Except it, seems to be a primitive control for over voltage, interrupting the power leading at output just under a certain limit defined by potentiometer.
By the way, the secondary side i
Analog Circuit Design :: 08-10-2014 11:50 :: andre_teprom :: Replies: 4 :: Views: 584
I want to ask you EDA-board gurus for suggestions with HSIM Co-simulation and Monte-Carlo simulations.
I want to run a MonteCarlo simulation in a relatively large transistor-level circuit (imagine a microcontroller), but the caveat is that the environment to this circuit is very complex and event-driven.
For example: if signal
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 08-07-2014 16:16 :: tadeoman :: Replies: 0 :: Views: 707
Hi everyone. I am looking for some good introduction tutorials on BJT and MOSFET transistors.
I am looking for tutorials that list "the steps" to take to do circuit analysis on BJT and MOSFET transistors. A tutorial that goes into good detail for cutoff, active, and saturation modes of a transistor. Overall, I am (...)
Analog Circuit Design :: 05-28-2014 14:53 :: danner123 :: Replies: 1 :: Views: 906
... sweep the input voltage from 0 to 1.2v
After DC simulation, I use results -> print -> DC operating points to print the results. But after I select one transistor, why there is only one voltage point printed, not a range from 0 to 1.2? How can I get a group of points?
If you print the operating poi
Analog Circuit Design :: 04-02-2014 17:11 :: erikl :: Replies: 1 :: Views: 437
Hi all ;
I'm a beginner in using ADS there are someone who can give the introduction.
knowing i use a MOS transistor in my simulation .
Analog Circuit Design :: 01-26-2014 21:29 :: So.nia :: Replies: 1 :: Views: 482
in all of your considerations you are mixing STATIC resistances and DYNAMIC resistances. For a good understanding of transistor functions it is very important to note that each transistor is a non-linear device.
And in those cases it is always necessary to discriminate between differential (dynamic) and static resistances.
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 01-18-2014 08:56 :: LvW :: Replies: 15 :: Views: 634
You can perform this analysis yourself, just deducing that each transistor Q invert signal from Basis to Collector.
It means that 10v placed at any Basis, produces 0v at its collector.
Due Basis of next transistors are connected to previous transistor Collector, signal will be inverted again and ahead.
In other words, this (...)
Analog Circuit Design :: 12-24-2013 13:47 :: andre_teprom :: Replies: 37 :: Views: 2375
Yes, with characterization tool you could generate the liberty file from spice netlist (transistor model).
I don't know nanotime.
ASIC Design Methodologies and Tools (Digital) :: 11-06-2013 08:30 :: rca :: Replies: 3 :: Views: 681
spice is a transistor simulator. So you need to built a circuit via text file or via schematic editor to generate this text file to then simulate it with a spice engine, and you need some stimulus.
ASIC Design Methodologies and Tools (Digital) :: 10-07-2013 13:54 :: rca :: Replies: 7 :: Views: 583
definition of s21 is the voltage gain, |s21|^2 is the transducer power gain. For your transient simulation: it depends on the strength of your input signal, maybe your transistor is already in saturation. maybe post your results.
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 09-26-2013 09:10 :: johnjoe :: Replies: 4 :: Views: 947
Because the operation is not small-signal, traditional
noise analysis is likely unhelpful.
Your output jitter is likely to be dominated by things
other than intrinsic transistor / resistor noises. Even if
these devices have proper noise params for the transient
/ pnoise to work, they are trivial contributors relative to
input supply noise, ground
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 09-19-2013 23:19 :: dick_freebird :: Replies: 1 :: Views: 905
Can anybody tell me what is a square transistor.I came across this word when I was reading the following paper:"Static-Noise Margin analysis of MOS
SRAM Cells EVERT SEEVINCK, SENIOR MEMBER, IEEE, FRANS J. LIST, AND JAN LOHSTROH, MEMBER, IEEE".
Elementary Electronic Questions :: 08-06-2013 19:23 :: TGupta :: Replies: 2 :: Views: 610
I am working on the design of a charging circuit, where i have to increase the transistor width to almost 5000 um for allowing the current to be 500mA, but when i increase the
size of the transistor an error of this sort comes in:
Gmin = 1 pS is large enough to noticeably affect the DC solution.
Linux Software :: 08-05-2013 16:28 :: vijith133 :: Replies: 2 :: Views: 2115
can we do transistor level simulation and also information about what are all the features which are useful for project designing of double tail comparator
whether this tool is used to do power ,timing, die size analysis etc
if anyone who are interested help me pls
ASIC Design Methodologies and Tools (Digital) :: 07-25-2013 13:26 :: aravindh91 :: Replies: 0 :: Views: 579
It is only natural to think this would work. It appears to comply with the concepts of transistor gain.
However your schematic will only work during the signal's positive waveform.
As soon as the signa
Hobby Circuits and Small Projects Problems :: 05-07-2013 02:56 :: BradtheRad :: Replies: 2 :: Views: 1526
When looking for power switches , remember this category...
Product Index > Integrated Circuits (ICs) > PMIC - Power Distribution Switches
Here is one of hundreds of examples.. Read the specs fully and buy a bunch. They are cheap.. <1$
Elementary Electronic Questions :: 04-28-2013 01:16 :: SunnySkyguy :: Replies: 23 :: Views: 15842
You can do it from dc analysis. In sweep parameters choose the "component parameter" position, like this:
Run simulation and now you can plot transconductance curve vs w or l of transistor.
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 04-04-2013 06:37 :: sarge :: Replies: 1 :: Views: 3615
Laplace transform is only applicable to linear systems, transistors are highly non-linear devices. How do you imagine to model it with laplace?
Mathematics and Physics :: 03-02-2013 21:08 :: FvM :: Replies: 8 :: Views: 3048
I want to simulate the effect of mismatch and process variation on the system performance of my SAR Analog to Digital Converter. The system now is simply ideal system with only one transistor level block, the other blocks are written
in Verilog-A code in Cadence-Spectre.
The easiest way to simulate the mismatch and process v
RF, Microwave, Antennas and Optics :: 02-21-2013 14:34 :: akkafrawy :: Replies: 0 :: Views: 2752
I'm just having the roughest time ever trying to write an atlas code for simulating a SiGe n MOS short channel transistor. I'm really new to atlas Silvaco and I've read a couple of examples, but I don't know how to setup a short channel mesh and how to create a pesudomorphic or virtual substrate alloy of SiGe to use as substrate
Software Problems, Hints and Reviews :: 02-15-2013 13:08 :: mskh744 :: Replies: 0 :: Views: 1095
you must see some examples on microwave transistor amplifiers design and analysis,Gonzalez
but first you must check your transistor is stable or not then matching
RF, Microwave, Antennas and Optics :: 02-04-2013 07:06 :: reza064 :: Replies: 3 :: Views: 1018