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Understanding Zero Circuit

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7 Threads found on edaboard.com: Understanding Zero Circuit
Question 1: Shown in the right figure, a resistor R2 in series connected with a parallel R1 and C1, which forms a pole :1/(R1*C), and a zero : 1/(( R1//R2) *C). The zero contributed by the effective resistor
As the title suggests I need some help understanding a circuit I built in college last semester. It is a reaction timer that counts the time it takes a user to react to the LEDs when they start to count. When the user stops the timer, the time of reaction is displayed. This is then cleared, when the user resets the LEDs, the LEDs display '000'
I'm wonder why and what these two FET stages does in this attached schematic? Why is there two and not just one to send bits to the coil? Thanks105944
64348 Please explain working of this light sensitive alarm.
try to replace each of the MOS by resistor for a clearer view. for intuitive understanding, at low frequency u get just Rs, at higher frequency one of the Rs is decreased by the capacitor (that is a pole), at higher frequency the capacitor completely shorts the lower resistor and the effective resistance is the upper one (that is a zero)
I have a basic understanding of current mirrors, but this circuit is very confusing to me. How would I solve for the current passing through R? Is the voltage at the top of R greater than 0??
I'm looking at a data sheet for a hy29f400bt bottom boot sector 4 meg flash memory chip. Trying to figure out the absolute address at the begining of memory and all I've figured out is I don't know what I'm looking at. Actually I'm looking at this data sheet because I know the beggining of memory for one device using this chip is 7ff80000. What