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235 Threads found on Vhdl Codes
I am using Active-HDL to write vhdl codes. I am able to write ans simulate one file codes but when it comes to multiple source files and components, the simulation doesn't work! It seems that there is a problem finding components in other source files. Please see the attached picture. As you can see in the left pane, the test bench is (...)
I have generated a VGA signal, and succeeded to draw a rectangle. I have also code for ROM designed using vhdl, and initialized with a file that has patterns. I'm beginner in vhdl and FPGA. I would like to read the contents of the ROM and use the VGA generator to display the contents. here are the codes. LIBRARY ieee; USE ieee.std_log
The first line google search comes up with this GitHub link: Principle: Code:
I am designing the 8255 peripheral interface function in to Spartan 3E familly. using vhdl code by XILINX software but now when i compile my code it says: ERROR:HDLCompiler:806 - "C:/Users/Addi/Documents/project/vlsi_vhdl/ppi8255/ppi8255.vhd" Line 367: Syntax error near "process". the full codes are below. (...)
hello everyone. i am studying final year in rvrjc college of engineering. and my project is about "implementation of 8 bit microcontroller using vhdl". i dont know how to start the project. can anyone help me in my work abour "code'
Hi, I have two questions. 1. Are there alternative methods to implement a combinational logical shifter similar to 'srl' and 'sll' syntax available in vhdl ? 2. I was curious to check the power consumption between these two design of shifters which I have implemented in vhdl. Note! Both these codes shown below are not meant for the (...)
hi I am trying to write a vhdl code from its matlab code.its related to image processing and i have some codes like imresize that they are nearly 900 line codes. Is there any library for these basic codes in vhdl from previous works??? thanks
Can someone advice me an already written Asynchronous FIFO (2 Clock FIFO) code in vhdl, possibly already used without problems? All the codes I've found generate me some errors. My FPGA manufacturer FIFO's when I try to read and write at the same time it create me problems in simulation and also I can't modify it or adapt to another FPGA. I n
My quesion is why are all ADC's output are in 2'complement. I am using LTC2294 ADC it gives output in offset binary or 2'complement, what is the reason behind this. Can I use 2'complement data stright away in my vhdl code or I have to convert it back to simple binary and then use it in my code, please help.
I'm final year student.Now i'm in project it possible to convert MATLAB code to HDL or vhdl. Please reply me immediately
Re: stepper motor vhdl codes Check your clkdiv.vhd code. There is port mismatch, it means "clkdiv.vhd has 2 input,2 output but in driver.vhd component declaration only 2 input and one output. Then mclk and clr is not declared anywhere in driver.vhd so check it Did you find this post helpful? Click: Yes
Hi I have Atlas Framework that it generates and simulates NoC (Network-on-Chip),but making the changes in it's vhdl codes in very difficult for me. I need a better tool that making changes in it's codes be you know a better tool for generating and simulating a NoC?If you know,please introduce it to me.
Hello Everyone, I am working on some codes for the serial-to-parallel fact I need to convert 6 serial values ( from 6 sensors which have already been converted to digital form) to parallel form which will be later fed to a comparator... I wrote some codes but I am encountering some errors...I would highly appreciate some help...
My final year project involves interfacing two ps2 keyboards to a digilent spartan3e xc3s500e board,the keys pressed are to be displayed on a pmod ssd that would be attached to the board,need vhdl codes for the keyboard interface and the 7 segment display,assistance neeeded..
please can anyone post the code vhdl of difference set cyclic codes(21,11).thanks in advance.
Hello, I am new to FPGAs and LCD devices. I am trying to interface an LCD device with a Spartan 3 kit (LCD module - 2 line-pre connected in it). Does anyone have a basic vhdl code to display a single character / word on the LCD panel. I am finding the codes available here and on the net complicated to understand. Also, what is CGRAM and DDRAM
Can some one please send me verilog/vhdl codes for Virtual Channel Router
hie, i am very new to vhdl and have got a project in which i have to make a 8 bit carry look ahead adder and write its testbench. for the inputs of the testbench i need to write a code using c language so that myinputs a, b and the expected sum are obtained which have to be included into the testbench. i am confused with the codes. please help me.
Plz can any one send me vhdl code for the following 16-bit Adders:- Carry Select Adder Carry Save Adder Carry Skip Adder if not code then atleast show how to do it by component modelling i.e. component diagram so that I can just club all the component codes and write on my own.
Hello every one. The two codes are below if(valid_shift_HIGH = '1') then if(buff_2Sn_empty = '0' and buff_2Sn_1_empty = '0') then rden_buff2 <= '1'; else rden_buff2 <= '0'; end if; else rden_buff2 <= '0'; end if; the other is rden_buff2 <= valid_shift_HIGH and (not buff_2Sn_empty and not b