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55 Threads found on Weak Pull Up
If the second application is also digital (I/O, PWM, etc.), then there's no need to remove it. You might need to make it a "weak" pull-up if the alternate function is an output.
This does not work however for simulations. As it's nicely mentioned in Edaboard forum rules Only you know what "doesn't work" means... Please clarify. Presumed the slave is also modelling an open drain output, you have to add a weak pull-up driver in the testbench. If the slave is not clearly driving '0' and 'Z' only, a r
You see anything from a few MHz to 50MHz or more depending on the parts in question Devices operating with the conventional standard SPI need pull-up resistors, which makes the bus somewhat "weak". For frequencies above the MHz order, must consider use an electrical standards based on differential pairs.
The difference matters. ULN2803 can't be driven by the weak internal pull-ups.
The pin used for relay should be configured as digital output pin. The feature doesn't exist for standard 8051 output ports. Port1 to 3 are open drain with weak pull-up. To get more output current in high-state, you have to place pull-up resistors. The outputs are driving high during ?C reset, which may be problem in some cases.
Why don't you refer to the datasheet GPIO input mode (/PORT-OUTENABLE deasserted), both output transistors are in off-state. You have the option to enable or disable the weak pull-up.
hi, You can use 10K PU on those pins, do you know that PORTB has internal weak pull ups.? E
Ok I made some HW modifications and it works. Cyclone IV has nor the possibility to programm pull down resistors, so I had to remove the resistor from the DIP switches and connecting to ground. Then I programmed internal weak pull up resistors and it looks to work fine. Thanks for your help!! Unless Cyclone IV is radic
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Do you understand 8051 port operation? They are open drain with or without a weak pull-up (depends on the port). None of them is sourcing sufficient current to drive a NPN switch transistor without additional pull-up resistor.
My Atmel C51 MCUs have I/O pins with open collector as output. To give the pin a high state, a weak pull-up resistance is added internally (equivalent to 50K approximately). So, if your MCU pin has also an open collector with a weak pull-up internal resistor, you can add an external pull-up one (from pin (...)
Some MCUs give a weak 5V at their o/p pins (as an open collector with a weak pull-up resistance). Are you sure the o/p pin of your MCU could be set as a 5V source (low internal resistance)? How can I check for the weak output? I am using 89C51 microcontroller. Is there are any alternative if the microcontroller happens
Port 0 has dynamical push-pull instead. Omitting weak pull-ups apparently seemed appropriate to the original 8051 designers. The detail has been copied with each 8051 compatible IO-port since 30 years. 8051 developers use to know this, or learn it later on.
It depends entirely on the design of the inverter. Some have a weak pull-up or pull-down so it goes to a known state if the input is disconnected but some will just 'float' with an indeterminate and possibly fluctuating output. Brian.
Hi, Prove it to yourself, if you have Mclre ON and leave Pin1 unconnected , the program may not run at all, or run on and off because that pin is floating. For that reason you must tie Pin1 to Vdd either direct or via a resistor, typically 10k, which is often used with a cap in a reset switch situation. I believe the weak internal pull up yo
IR2110 has weak input pull-down resistors, so the input won't actually float. It may be the case, that you are driving it with a pull-up resistor in the microcontroller. In this case, you would want to place a stronger external pull-down.
I am using PIC18F452 controller, in this i want to use PORTC to interface a compass. In the datasheet he mentioned PORTB has weak pull-up resistors, but he didn't mentioned anywhere about PORTC pull up resistors. Does PORTC have pull ups?
Usually SPI doesn't use pullup unless you have a microcontroller that has open drain outputs or very weak current sourcing capability. pullup resistors are used in I2C which uses open drain pins but this is a different case.
hi today i tried to build a simple program that turns on LED when a button is push, using weak pull-up feature list F=inhx8m, P=16F688, R=hex, N=0 #include P16F688.INC __config _INTRC_OSC_NOCLKOUT & _WDT_OFF & _PWRTE_ON & _MCLRE_OFF & _CPD_OFF & _BOD_OFF & _IESO_ON & _FCMEN_ON ;definitions --------------------------- ba
Some FPGA power up with a weak pull-up resistor at all I/O pins. If you won't signals turned on before configuration, you should define I/O signals active low. It's also usual, to have higher drive strength for low side transistors, but the ration isn't very high for usual CMOS I/O standards. I don't see a problem to drive moderate LED currents
A weak pull-down will never bring the voltage down when something is still pulling it up, but if the circuit is purely capacitive have a look at the attached graph .. :wink: IanP
When the pin is set as an input there is an internal pull up resistor (can be also set to pull down) that is actually very weak, if you want to get a higher voltage you have to use an external pull up resistor. When the pin is set as an output the voltage is quite normal. 0 and 3v3. Note that as you sink /source more (...)
Look at your driver spec VOL condition, usually milliamps of load. Below this it's guaranteed to make VOL. You may not need to pull that much. It wastes power. pullups can help deal with things like what happens to that "output" signal (your input) during power-up where FETs might be too weak to assert a proper state, the pin goes (...)
Sounds like you are trying to make a 8051 output port source current to the opto coupler. As you can read from the data sheet, they aren't intended for this operation, they are just open drain outputs with a weak pull-up. The most simple method would be to operate the output active low rather than active high. If you ever studied 8051 example cuirc
In PIC18F4550, only PORTB has internal weak pull-ups, the other ports don't. Hope this helps. Tahmid.
if you want 20 mA you need to set it to 'output' and assert a high on that pin.... the internal pull-up (weak pull-up) is only for 'input' mode on that pin... note also that if a pin can source 20mA all the pins can't source more than 100mA or all the ports more than 200mA (of course it depends on your microcontroller (PIC? AVR?), but (...)
If i write logic 1 on that pin,it shows as output is high. And that's OK, as it’s a very weak internal pull-up that causes the pin to go "high", but it will by no means interfere with the sonar .. Just write a "1" and this pin will act as INPUT .. IanP :D
Try to set this RX pin as input (this will put the corresponding output driver in a High-Impedance mode) and maybe disable the weak pull-up .. IanP :D
All P1 port pins have “weak” internal pull-ups, so if you use them as general purpose input/output pins you don’t need to add any external pull-up resistors .. Rgds, IanP :|
On power-on all I/O pins are set as inputs and pulled-up by internal (weak) circuit .. ExtInt0 and ExtInt1 can be set to trigger an interrupt on the falling edge or low level, that mans that you can safely pull them down to the GND level and by doing so start an interrupt service routine – there is nothing dangerous in this action, (...)
i want to control DC motor using PIC18f452& transistor TIP120 and i use port B (PB07) to switch on and off but the problem the motor does not run properly i heard that we have to use port C to control motor because portB is weak pull up is it true??
You need 4 Mosfets in an h-bridge. Now, the Mosfets strongly pull down but the 4.7k resistors weakly pull up. So if you connect the load between them the load gets a weak current. With an h-bridge the current is high in both directions.
Wanting to use MCLR as interrupt port change state - its set high. Prefer to use weak internal pull-up. Tried this: ioc.3=1; intcon.GPIE=1; //enable IOC bit for GP3, then GPIE //in ISR checked for state when button pressed high to low thusly: if (GPIE && intcon.GPIF) //nosuch IRQ not being called The logical port to use would be GP2/ext int p
I have read some where that the pull up transistors should be weak...why is it so?
Hi, /***************************************** include // SFR declarations void InitPort() { XBR2 = 0xD8; // Enable crossbar and weak pull-up P2MDOUT |= 0xFF; } void main() { InitPort(); } *****************************************/ i think for enabling crossbar & disabling weak pull-up's (...)
Many FPGA have unconditionally active weak pull-up resistors, some provide a selection between high impedance and weak pull-up by pin-strapping.
Port pull ups are can be enabled so if you are using the lines as inputs, you dont need to add external resistors to pull the lines up to Vcc. You cant have floating inputs, pull ups hold them in a high state. They are weak pull ups, sort of like adding a 220k resistor to the line.
Output state wouldn't be set through a weak-pull resistor, this has an effect only for input or bidir pins (also open-drain, of course). weak pull-up can be enabled in Pin Planner tool (with newer Quartus versions) or in assignment editor, also for group of pins with wildcard pingroup* syntax. As nearly everything you may (...)
Hi, I have to place a pull-down resistor on an FPGA output that is HiZ or weak pull-up during start-up. The line is quite long and I wonder if I should connect the pull-down to the driver side or to the receiver side of the signal. Any ideeas or docs on this?
A weak pullup will hold a value on a pin while all other drivers are in tri-state, and can be over-ridden by the value of the driver, once it starts driving. A strong pullup cannot be over-ridden by the driver, and will cause contention.
If pin HSWAP_EN is low, all the I/O pins will have pull-up resistors (a few kilo-ohms) during configuration. If pin HSWAP_EN is high, all the I/O pins will float (high-impedance) during configuration. You could tie HSWAP_EN high to float the I/O pins during configuration, and then install your own weak pull-down resistors to hold the I/O (...)
How have you set up internal pullup: Each of the PORTB pins has a weak internal pull-up. A single control bit can turn on all the pull-ups. This is performed by clearing bit RBPU (INTCON2<7>). The weak pull-up is automatically turned off when the port pin is configured as an output. The (...)
Hi Fuzzzy, I thihg that the Mosfets can be ON during startup. In the schematic picture you can see the reason. When an I/O is configured as an input, FETs Q1 and Q2 are off, creating a high impedance input with a weak pull-up 100k to VDD. One solution of this problem is connect resistor betwen Gate Mosfet and VSS. JURS
It's possible that you have the outputs configured with weak pull-ups enabled. The i/o's can be configured with weak pull-up, pull-down, or none. weak pull-ups would explain the voltage you see but will not supply enough current to cause the led to emit.
No. The pull-up resistor only acts as a "weak" pull-up source. So when slave drives low, the net will be pulled-down to '0'. -------------------------------------------------------------------------------- You can also refer to the open-drain circuit.
Hi, The AT89S52's ports have a weak pull-up that holds the outputs at 5V when the pin is written with "1". (Port 0 don't even have these pull-ups) This can affect the rise/fall times of the signals due to the cable capacitance and beside that, it makes the transmission susceptible to EM noise. You can try buffering your connection, using (...)
In the case of the push-pull pad you have strong low and strong high. In the case of the push-up you have strong low and weak high without external resistor or current source. In the case of the open-drain you have strong low and high impedance state. You can use open-drain pad to connect more signals to one common line with active low e
Hi, I face some problems in designing a full CMOS SRAM cell: 1. The choose of W/L ratio The W/L of the back-to-back inverters should be the same? I saw this in somewhere. I was confuse by that because in a latch, the forward inverter should be stronger than the feedback inverter... The Wordline transistor should have smaller W/L compare
Hi, I face some problems in designing a full CMOS SRAM cell: 1. The choose of W/L ratio The W/L of the back-to-back inverters should be the same? I saw this in somewhere. I was confuse by that because in a latch, the forward inverter should be stronger than the feedback inverter... The Wordline transistor should have smaller W/L com
I don't think it is possible to disable the weak pullups on this micro. It is basically an 80C32, where the pullups are always on, to allow the I/O pins to function as both inputs and outputs, simply by clearing the port latch; there is no data direction register. Is it really that important to have the pullup disabled? (...)

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